1/*
2 * Copyright (c) 2018 qianfan Zhao
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/f2/stm32f207Xg.dtsi>
9#include <st/f2/stm32f207z(c-e-f-g)tx-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "STMicroelectronics STM32F207ZG-NUCLEO board";
15	compatible = "st,stm32f207zg-nucleo";
16
17	chosen {
18		zephyr,console = &usart3;
19		zephyr,shell-uart = &usart3;
20		zephyr,sram = &sram0;
21		zephyr,flash = &flash0;
22	};
23
24	leds: leds {
25		compatible = "gpio-leds";
26		green_led_1: led_1 {
27			gpios = <&gpiob 0 GPIO_ACTIVE_HIGH>;
28			label = "User LD1";
29		};
30		blue_led_1: led_2 {
31			gpios = <&gpiob 7 GPIO_ACTIVE_HIGH>;
32			label = "User LD2";
33		};
34		red_led_1: led_3 {
35			gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
36			label = "User LD3";
37		};
38	};
39
40	pwmleds {
41		compatible = "pwm-leds";
42
43		green_pwm_led: led_pwm_1 {
44			pwms = <&pwm3 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
45			label = "Green PWM LED";
46		};
47		blue_pwm_led: led_pwm_2 {
48			pwms = <&pwm4 2 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
49			label = "Blue PWM LED";
50		};
51		red_pwm_led: led_pwm_0 {
52			pwms = <&pwm12 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
53			label = "Red PWM LED";
54		};
55	};
56
57	gpio_keys {
58		compatible = "gpio-keys";
59		user_button: button {
60			label = "User";
61			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
62			zephyr,code = <INPUT_KEY_0>;
63		};
64	};
65
66	aliases {
67		led0 = &green_led_1;
68		led1 = &blue_led_1;
69		led2 = &red_led_1;
70		pwm-led0 = &green_pwm_led;
71		pwm-led1 = &blue_pwm_led;
72		pwm-led2 = &red_pwm_led;
73		green-pwm-led = &green_pwm_led;
74		blue-pwm-led = &blue_pwm_led;
75		red-pwm-led = &red_pwm_led;
76		sw0 = &user_button;
77		watchdog0 = &iwdg;
78		die-temp0 = &die_temp;
79	};
80};
81
82&clk_lsi {
83	status = "okay";
84};
85
86&clk_hse {
87	hse-bypass;
88	clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
89	status = "okay";
90};
91
92&pll {
93	div-m = <8>;
94	mul-n = <240>;
95	div-p = <2>;
96	div-q = <5>;
97	clocks = <&clk_hse>;
98	status = "okay";
99};
100
101&rcc {
102	clocks = <&pll>;
103	clock-frequency = <DT_FREQ_M(120)>;
104	ahb-prescaler = <1>;
105	apb1-prescaler = <4>;
106	apb2-prescaler = <2>;
107};
108
109&spi1 {
110	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
111	pinctrl-names = "default";
112	cs-gpios = <&gpiod 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
113	status = "okay";
114};
115
116&i2c1 {
117	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
118	pinctrl-names = "default";
119	status = "okay";
120	clock-frequency = <I2C_BITRATE_FAST>;
121};
122
123&i2c2 {
124	pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
125	pinctrl-names = "default";
126	status = "okay";
127	clock-frequency = <I2C_BITRATE_FAST>;
128};
129
130&usart3 {
131	pinctrl-0 = <&usart3_tx_pd8 &usart3_rx_pd9>;
132	pinctrl-names = "default";
133	current-speed = <115200>;
134	status = "okay";
135};
136
137&usart6 {
138	pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pg9>;
139	pinctrl-names = "default";
140	current-speed = <115200>;
141	status = "okay";
142};
143
144zephyr_udc0: &usbotg_fs {
145	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
146	pinctrl-names = "default";
147	status = "okay";
148};
149
150&iwdg {
151	status = "okay";
152};
153
154&rtc {
155	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
156		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
157	status = "okay";
158};
159
160&rng {
161	status = "okay";
162};
163
164&adc1 {
165	pinctrl-0 = <&adc1_in0_pa0>;
166	pinctrl-names = "default";
167	st,adc-clock-source = "SYNC";
168	st,adc-prescaler = <2>;
169	status = "okay";
170};
171
172&die_temp {
173	status = "okay";
174};
175
176&dma2 {
177	status = "okay";
178};
179
180&mac {
181	status = "okay";
182	pinctrl-0 = <&eth_mdc_pc1
183		     &eth_rxd0_pc4
184		     &eth_rxd1_pc5
185		     &eth_ref_clk_pa1
186		     &eth_mdio_pa2
187		     &eth_crs_dv_pa7
188		     &eth_tx_en_pg11
189		     &eth_txd0_pg13
190		     &eth_txd1_pb13>;
191	pinctrl-names = "default";
192};
193
194&flash0 {
195	partitions {
196		compatible = "fixed-partitions";
197		#address-cells = <1>;
198		#size-cells = <1>;
199
200		boot_partition: partition@0 {
201			label = "mcuboot";
202			reg = <0x0 DT_SIZE_K(32)>;
203			read-only;
204		};
205
206		/*
207		 * nvs subsystem requires 2 sectors with a max total of 32K
208		 * On F2 series, the only option is to use the following
209		 * partition, which is compatible with mcuboot usage.
210		 * Keep it commented in order it is not used by CI.
211		 *
212		 * storage_partition: partition@8000 {
213		 *	label = "storage";
214		 *	reg = <0x8000 DT_SIZE_K(32)>;
215		 * };
216		 */
217
218		slot0_partition: partition@20000 {
219			label = "image-0";
220			reg = <0x20000 DT_SIZE_K(448)>;
221		};
222
223		slot1_partition: partition@90000 {
224			label = "image-1";
225			reg = <0x90000 DT_SIZE_K(448)>;
226		};
227	};
228};
229
230&dac1 {
231	status = "okay";
232	pinctrl-0 = <&dac_out1_pa4>;
233	pinctrl-names = "default";
234};
235
236&backup_sram {
237	status = "okay";
238};
239
240&timers1 {
241	status = "okay";
242
243	pwm1: pwm {
244		status = "okay";
245		pinctrl-0 = <&tim1_ch1_pe9>;
246		pinctrl-names = "default";
247	};
248};
249
250&timers3 {
251	status = "okay";
252	st,prescaler = <10000>;
253
254	pwm3: pwm {
255		status = "okay";
256		pinctrl-0 = <&tim3_ch3_pb0>;
257		pinctrl-names = "default";
258	};
259};
260
261&timers4 {
262	status = "okay";
263	st,prescaler = <10000>;
264
265	pwm4: pwm {
266		status = "okay";
267		pinctrl-0 = <&tim4_ch2_pb7>;
268		pinctrl-names = "default";
269	};
270};
271
272&timers12 {
273	status = "okay";
274	st,prescaler = <10000>;
275
276	pwm12: pwm {
277		status = "okay";
278		pinctrl-0 = <&tim12_ch1_pb14>;
279		pinctrl-names = "default";
280	};
281};
282