1/*
2 * Copyright (c) 2017 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/l4/stm32l475Xg.dtsi>
9#include <st/l4/stm32l475v(c-e-g)tx-pinctrl.dtsi>
10#include "arduino_r3_connector.dtsi"
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12
13/ {
14	model = "STMicroelectronics B-L475E-IOT01Ax board";
15	compatible = "st,stm32l475-disco-iot";
16
17	chosen {
18		zephyr,console = &usart1;
19		zephyr,shell-uart = &usart1;
20		zephyr,sram = &sram0;
21		zephyr,flash = &flash0;
22		zephyr,code-partition = &slot0_partition;
23		zephyr,flash-controller = &mx25r6435f;
24		zephyr,bt-c2h-uart = &usart1;
25		zephyr,bt-hci = &hci_spi;
26	};
27
28	leds {
29		compatible = "gpio-leds";
30		green_led_1: led_1 {
31			gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
32			label = "User LD1";
33		};
34		green_led_2: led_2 {
35			gpios = <&gpiob 14 GPIO_ACTIVE_HIGH>;
36			label = "User LD2";
37		};
38	};
39
40	gpio_keys {
41		compatible = "gpio-keys";
42		user_button: button_0 {
43			label = "User";
44			gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
45			zephyr,code = <INPUT_KEY_0>;
46		};
47	};
48
49	pwmleds: pwmleds {
50		compatible = "pwm-leds";
51		status = "disabled";
52
53		/*
54		 * green_pwm_1 is connected to CN1 pin 2 not LD1, since LD1
55		 * shares a pin with the Arduino SPI SCL line.
56		 */
57		green_pwm_1: green_led_1 {
58			pwms = <&pwm2 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
59			label = "green LD1";
60		};
61		green_pwm_2: green_led_2 {
62			pwms = <&pwm15 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
63			label = "green LD2";
64		};
65	};
66
67	aliases {
68		led0 = &green_led_2;
69		led1 = &green_led_1;
70		pwm-led0 = &green_pwm_2;
71		pwm-led1 = &green_pwm_1;
72		sw0 = &user_button;
73		eswifi0 = &wifi0;
74		watchdog0 = &iwdg;
75		accel0 = &lsm6dsl;
76		volt-sensor0 = &vref;
77		volt-sensor1 = &vbat;
78		die-temp0 = &die_temp;
79	};
80};
81
82&clk_lsi {
83	status = "okay";
84};
85
86&clk_lse {
87	status = "okay";
88};
89
90&clk_hsi {
91	status = "okay";
92};
93
94&clk_msi {
95	status = "okay";
96	msi-pll-mode;
97	msi-range = <11>; /* 48MHz USB bus clk */
98};
99
100&pll {
101	div-m = <1>;
102	mul-n = <20>;
103	div-p = <7>;
104	div-q = <2>;
105	div-r = <4>;
106	clocks = <&clk_hsi>;
107	status = "okay";
108};
109
110&rcc {
111	clocks = <&pll>;
112	clock-frequency = <DT_FREQ_M(80)>;
113	ahb-prescaler = <1>;
114	apb1-prescaler = <1>;
115	apb2-prescaler = <1>;
116};
117
118&usart1 {
119	current-speed = <115200>;
120	pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
121	pinctrl-names = "default";
122	status = "okay";
123};
124
125&uart4 {
126	pinctrl-0 = <&uart4_tx_pa0 &uart4_rx_pa1>;
127	pinctrl-names = "default";
128	current-speed = <115200>;
129	status = "okay";
130};
131
132&i2c1 {
133	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
134	pinctrl-names = "default";
135	status = "okay";
136	clock-frequency = <I2C_BITRATE_FAST>;
137};
138
139&i2c2 {
140	pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb11>;
141	pinctrl-names = "default";
142	status = "okay";
143	clock-frequency = <I2C_BITRATE_FAST>;
144
145	lis3mdl-magn@1e {
146		compatible = "st,lis3mdl-magn";
147		reg = <0x1e>;
148	};
149
150	hts221@5f {
151		compatible = "st,hts221";
152		reg = <0x5f>;
153		drdy-gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>;
154	};
155
156	lps22hb-press@5d {
157		compatible = "st,lps22hb-press";
158		reg = <0x5d>;
159	};
160
161	lsm6dsl: lsm6dsl@6a {
162		compatible = "st,lsm6dsl";
163		reg = <0x6a>;
164		irq-gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
165	};
166
167	vl53l0x@29 {
168		compatible = "st,vl53l0x";
169		reg = <0x29>;
170		xshut-gpios = <&gpioc 6 GPIO_ACTIVE_LOW>;
171	};
172};
173
174&i2c3 {
175	pinctrl-0 = <&i2c3_scl_pc0 &i2c3_sda_pc1>;
176	pinctrl-names = "default";
177	status = "okay";
178	clock-frequency = <I2C_BITRATE_FAST>;
179};
180
181&spi1 {
182	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
183	pinctrl-names = "default";
184	cs-gpios = <&gpioa 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
185	status = "okay";
186};
187
188&spi3_miso_pc11 { slew-rate = "very-high-speed"; };
189
190&spi3 {
191	status = "okay";
192
193	pinctrl-0 = <&spi3_sck_pc10 &spi3_miso_pc11 &spi3_mosi_pc12>;
194	pinctrl-names = "default";
195
196	cs-gpios = <&gpiod 13 GPIO_ACTIVE_LOW>,
197		   <&gpioe 0 GPIO_ACTIVE_LOW>;
198
199	hci_spi: spbtle-rf@0 {
200		compatible = "st,hci-spi-v1";
201		reg = <0>;
202		reset-gpios = <&gpioa 8 GPIO_ACTIVE_LOW>;
203		irq-gpios = <&gpioe 6 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
204		spi-max-frequency = <DT_FREQ_M(2)>;
205		spi-hold-cs;
206	};
207
208	wifi0: ism43362@1 {
209		compatible = "inventek,eswifi";
210		spi-max-frequency = <2000000>;
211		reg = <1>;
212		resetn-gpios = <&gpioe 8 GPIO_ACTIVE_HIGH>;
213		boot0-gpios = <&gpiob 12 GPIO_ACTIVE_HIGH>;
214		wakeup-gpios = <&gpiob 13 GPIO_ACTIVE_HIGH>;
215		data-gpios = <&gpioe 1 GPIO_ACTIVE_HIGH>;
216	};
217};
218
219&flash0 {
220	partitions {
221		compatible = "fixed-partitions";
222		#address-cells = <1>;
223		#size-cells = <1>;
224
225		boot_partition: partition@0 {
226			label = "mcuboot";
227			reg = <0x0 DT_SIZE_K(64)>;
228			read-only;
229		};
230
231		slot0_partition: partition@1000 {
232			label = "image-0";
233			reg = <0x1000 DT_SIZE_K(928)>;
234		};
235
236		storage_partition: partition@f8000 {
237			label = "storage";
238			reg = <0xf8000 DT_SIZE_K(32)>;
239		};
240	};
241};
242
243&timers2 {
244	st,prescaler = <10000>;
245	status = "okay";
246
247	pwm2: pwm {
248		status = "okay";
249		pinctrl-0 = <&tim2_ch1_pa15>; /* CN1 pin 2 (ARD.D9-PWM) */
250		pinctrl-names = "default";
251	};
252};
253
254&timers15 {
255	st,prescaler = <10000>;
256	status = "okay";
257
258	pwm15: pwm {
259		status = "okay";
260		pinctrl-0 = <&tim15_ch1_pb14>; /* LED2 */
261		pinctrl-names = "default";
262	};
263};
264
265stm32_lp_tick_source: &lptim1 {
266	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
267		 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
268	status = "okay";
269};
270
271&rtc {
272	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
273		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
274	status = "okay";
275};
276
277zephyr_udc0: &usbotg_fs {
278	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
279		     &usb_otg_fs_id_pa10>;
280	pinctrl-names = "default";
281	status = "okay";
282};
283
284&iwdg {
285	status = "okay";
286};
287
288&rng {
289	status = "okay";
290};
291
292&adc1 {
293	pinctrl-0 = <&adc1_in3_pc2 &adc1_in4_pc3
294		     &adc1_in13_pc4 &adc1_in14_pc5>;
295	pinctrl-names = "default";
296	st,adc-clock-source = "SYNC";
297	st,adc-prescaler = <4>;
298	status = "okay";
299};
300
301&die_temp {
302	status = "okay";
303};
304
305&dac1 {
306	status = "okay";
307	pinctrl-0 = <&dac1_out1_pa4>;
308	pinctrl-names = "default";
309};
310
311&dma1 {
312	status = "okay";
313};
314
315&quadspi {
316	pinctrl-0 = <&quadspi_clk_pe10 &quadspi_ncs_pe11
317		     &quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
318		     &quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15>;
319	pinctrl-names = "default";
320	dmas = <&dma1 5 5 0x0000>;
321	dma-names = "tx_rx";
322
323	status = "okay";
324
325	mx25r6435f: qspi-nor-flash@90000000 {
326		compatible = "st,stm32-qspi-nor";
327		reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
328		qspi-max-frequency = <50000000>;
329		status = "okay";
330
331		partitions {
332			compatible = "fixed-partitions";
333			#address-cells = <1>;
334			#size-cells = <1>;
335
336			slot1_partition: partition@0 {
337				label = "image-1";
338				reg = <0x00000000 DT_SIZE_K(864)>;
339				};
340
341			slot2_partition: partition@d8000 {
342				label = "image-3";
343				reg = <0x000d8000 DT_SIZE_M(7)>;
344			};
345		};
346	};
347};
348
349&vref {
350	status = "okay";
351};
352
353&vbat {
354	status = "okay";
355};
356