1/* 2 * Copyright (c) 2024 Renesas Electronics Corporation 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6&pinctrl { 7 sci3_default: sci3_default { 8 group1 { 9 /* tx */ 10 psels = <RA_PSEL(RA_PSEL_SCI_3, 3, 10)>; 11 drive-strength = "medium"; 12 }; 13 group2 { 14 /* rx */ 15 psels = <RA_PSEL(RA_PSEL_SCI_3, 3, 9)>; 16 }; 17 }; 18 19 spi0_default: spi0_default { 20 group1 { 21 /* MISO MOSI RSPCK SSL*/ 22 psels = <RA_PSEL(RA_PSEL_SPI, 3, 13)>, 23 <RA_PSEL(RA_PSEL_SPI, 2, 2)>, 24 <RA_PSEL(RA_PSEL_SPI, 2, 3)>, 25 <RA_PSEL(RA_PSEL_SPI, 2, 4)>; 26 }; 27 }; 28 29 pwm2_default: pwm2_default { 30 group1 { 31 /* GTIOC2A */ 32 psels = <RA_PSEL(RA_PSEL_GPT1, 1, 13)>; 33 }; 34 group2 { 35 /* GTIOC2B */ 36 psels = <RA_PSEL(RA_PSEL_GPT1, 1, 14)>; 37 }; 38 }; 39 40 canfd1_default: canfd1_default { 41 group1 { 42 /* CRX1 CTX1 */ 43 psels = <RA_PSEL(RA_PSEL_CANFD, 4, 14)>, 44 <RA_PSEL(RA_PSEL_CANFD, 4, 15)>; 45 drive-strength = "high"; 46 }; 47 }; 48 49 iic1_default: iic1_default { 50 group1 { 51 /* SCL1 SDA1*/ 52 psels = <RA_PSEL(RA_PSEL_I2C, 2, 5)>,<RA_PSEL(RA_PSEL_I2C, 2, 6)>; 53 drive-strength = "medium"; 54 }; 55 }; 56 57 ether_default: ether_default { 58 group1 { 59 psels = <RA_PSEL(RA_PSEL_ETH_RMII, 4, 1)>, /* ET0_MDC */ 60 <RA_PSEL(RA_PSEL_ETH_RMII, 4, 2)>, /* ET0_MDIO */ 61 <RA_PSEL(RA_PSEL_ETH_RMII, 4, 3)>, /* ET0_LINKSTA */ 62 <RA_PSEL(RA_PSEL_ETH_RMII, 4, 5)>, /* RMII0_TXD_EN_B */ 63 <RA_PSEL(RA_PSEL_ETH_RMII, 4, 6)>, /* RMII0_TXD1_BR */ 64 <RA_PSEL(RA_PSEL_ETH_RMII, 7, 0)>, /* RMII0_TXD0_B */ 65 <RA_PSEL(RA_PSEL_ETH_RMII, 7, 1)>, /* REF50CK0_B */ 66 <RA_PSEL(RA_PSEL_ETH_RMII, 7, 2)>, /* RMII0_RXD0_B */ 67 <RA_PSEL(RA_PSEL_ETH_RMII, 7, 3)>, /* RMII0_RXD1_B */ 68 <RA_PSEL(RA_PSEL_ETH_RMII, 7, 4)>, /* RMII0_RX_ER_B */ 69 <RA_PSEL(RA_PSEL_ETH_RMII, 7, 5)>; /* RMII0_CRS_DV_B */ 70 drive-strength = "high"; 71 }; 72 }; 73 74 adc0_default: adc0_default { 75 group1 { 76 /* input */ 77 psels = <RA_PSEL(RA_PSEL_ADC, 0, 4)>; 78 renesas,analog-enable; 79 }; 80 }; 81 82 sdhc0_default: sdhc0_default { 83 group1 { 84 psels = <RA_PSEL(RA_PSEL_SDHI, 3, 6)>, /* SDCD */ 85 <RA_PSEL(RA_PSEL_SDHI, 3, 7)>, /* SDCMD */ 86 <RA_PSEL(RA_PSEL_SDHI, 3, 4)>, /* SDDATA0 */ 87 <RA_PSEL(RA_PSEL_SDHI, 3, 3)>, /* SDDATA1 */ 88 <RA_PSEL(RA_PSEL_SDHI, 3, 2)>, /* SDDATA2 */ 89 <RA_PSEL(RA_PSEL_SDHI, 3, 1)>, /* SDDATA3 */ 90 <RA_PSEL(RA_PSEL_SDHI, 3, 5)>; /* SDWP */ 91 drive-strength = "high"; 92 }; 93 group2 { 94 psels = <RA_PSEL(RA_PSEL_SDHI, 3, 8)>; /* SDCLK */ 95 drive-strength = "highspeed-high"; 96 }; 97 }; 98}; 99