1/*
2 * Copyright (c) 2024 Renesas Electronics Corporation
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	sci0_default: sci0_default {
8		group1 {
9			/* tx rx */
10			psels = <RA_PSEL(RA_PSEL_SCI_0, 4, 11)>,
11			<RA_PSEL(RA_PSEL_SCI_0, 4, 10)>;
12		};
13	};
14
15	iic1_default: iic1_default {
16		group1 {
17			/* SCL1 SDA1 */
18			psels = <RA_PSEL(RA_PSEL_I2C, 5, 12)>,
19			<RA_PSEL(RA_PSEL_I2C, 5, 11)>;
20			drive-strength = "medium";
21		};
22	};
23
24	spi0_default: spi0_default {
25		group1 {
26			/* MISO MOSI RSPCK SSL */
27			psels = <RA_PSEL(RA_PSEL_SPI, 2, 2)>,
28			<RA_PSEL(RA_PSEL_SPI, 2, 3)>,
29			<RA_PSEL(RA_PSEL_SPI, 2, 4)>,
30			<RA_PSEL(RA_PSEL_SPI, 2, 5)>;
31		};
32	};
33
34	usbhs_default: usbhs_default {
35		group1 {
36			psels = <RA_PSEL(RA_PSEL_USBHS, 11, 1)>; /* USBHS-VBUS */
37			drive-strength = "high";
38		};
39	};
40
41	adc0_default: adc0_default {
42		group1 {
43			/* input */
44			psels = <RA_PSEL(RA_PSEL_ADC, 0, 0)>;
45			renesas,analog-enable;
46		};
47	};
48
49	pwm1_default: pwm1_default {
50		group1 {
51			/* GTIOC1A GTIOC1B */
52			psels = <RA_PSEL(RA_PSEL_GPT1, 4, 5)>,
53				<RA_PSEL(RA_PSEL_GPT1, 4, 6)>;
54		};
55	};
56};
57