1 /*
2 * Copyright (c) 2016-2019 Nordic Semiconductor ASA
3 * Copyright (c) 2018 Intel Corporation
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #include <soc.h>
9 #include <zephyr/init.h>
10 #include <zephyr/drivers/clock_control.h>
11 #include <zephyr/drivers/clock_control/nrf_clock_control.h>
12 #include <zephyr/drivers/timer/system_timer.h>
13 #include <zephyr/sys_clock.h>
14 #include <hal/nrf_timer.h>
15 #include <zephyr/spinlock.h>
16 #include <zephyr/irq.h>
17
18 #define TIMER NRF_TIMER0
19
20 #define COUNTER_MAX 0xFFFFFFFFUL
21 #define COUNTER_HALF_SPAN 0x80000000UL
22 #define CYC_PER_TICK (sys_clock_hw_cycles_per_sec() \
23 / CONFIG_SYS_CLOCK_TICKS_PER_SEC)
24 #define MAX_TICKS ((COUNTER_HALF_SPAN - CYC_PER_TICK) / CYC_PER_TICK)
25 #define MAX_CYCLES (MAX_TICKS * CYC_PER_TICK)
26
27 static struct k_spinlock lock;
28
29 static uint32_t last_count;
30
counter_sub(uint32_t a,uint32_t b)31 static uint32_t counter_sub(uint32_t a, uint32_t b)
32 {
33 return (a - b) & COUNTER_MAX;
34 }
35
set_comparator(uint32_t cyc)36 static void set_comparator(uint32_t cyc)
37 {
38 nrf_timer_cc_set(TIMER, NRF_TIMER_CC_CHANNEL0, cyc & COUNTER_MAX);
39 }
40
get_comparator(void)41 static uint32_t get_comparator(void)
42 {
43 return nrf_timer_cc_get(TIMER, NRF_TIMER_CC_CHANNEL0);
44 }
45
event_clear(void)46 static void event_clear(void)
47 {
48 nrf_timer_event_clear(TIMER, NRF_TIMER_EVENT_COMPARE0);
49 }
50
int_disable(void)51 static void int_disable(void)
52 {
53 nrf_timer_int_disable(TIMER, NRF_TIMER_INT_COMPARE0_MASK);
54 }
55
int_enable(void)56 static void int_enable(void)
57 {
58 nrf_timer_int_enable(TIMER, NRF_TIMER_INT_COMPARE0_MASK);
59 }
60
counter(void)61 static uint32_t counter(void)
62 {
63 nrf_timer_task_trigger(TIMER,
64 nrf_timer_capture_task_get(NRF_TIMER_CC_CHANNEL1));
65
66 return nrf_timer_cc_get(TIMER, NRF_TIMER_CC_CHANNEL1);
67 }
68
69 /* Function ensures that previous CC value will not set event */
prevent_false_prev_evt(void)70 static void prevent_false_prev_evt(void)
71 {
72 uint32_t now = counter();
73 uint32_t prev_val;
74
75 /* First take care of a risk of an event coming from CC being set to
76 * next tick. Reconfigure CC to future (now tick is the furthest
77 * future). If CC was set to next tick we need to wait for up to 0.5us
78 * (half of 1M tick) and clean potential event. After that time there
79 * is no risk of unwanted event.
80 */
81 prev_val = get_comparator();
82 event_clear();
83 set_comparator(now);
84
85 if (counter_sub(prev_val, now) == 1) {
86 k_busy_wait(1);
87 event_clear();
88 }
89
90 /* Clear interrupt that may have fired as we were setting the
91 * comparator.
92 */
93 NVIC_ClearPendingIRQ(TIMER0_IRQn);
94 }
95
96 /* If settings is next tick from now, function attempts to set next tick. If
97 * counter progresses during that time it means that 1 tick elapsed and
98 * interrupt is set pending.
99 */
handle_next_tick_case(uint32_t t)100 static void handle_next_tick_case(uint32_t t)
101 {
102 set_comparator(t + 2U);
103 while (t != counter()) {
104 /* already expired, tick elapsed but event might not be
105 * generated. Trigger interrupt.
106 */
107 t = counter();
108 set_comparator(t + 2U);
109 }
110 }
111
112 /* Function safely sets absolute alarm. It assumes that provided value is
113 * less than MAX_TICKS from now. It detects late setting and also handles
114 * +1 tick case.
115 */
set_absolute_ticks(uint32_t abs_val)116 static void set_absolute_ticks(uint32_t abs_val)
117 {
118 uint32_t diff;
119 uint32_t t = counter();
120
121 diff = counter_sub(abs_val, t);
122 if (diff == 1U) {
123 handle_next_tick_case(t);
124 return;
125 }
126
127 set_comparator(abs_val);
128 }
129
130 /* Sets relative ticks alarm from any context. Function is lockless. It only
131 * blocks TIMER interrupt.
132 */
set_protected_absolute_ticks(uint32_t ticks)133 static void set_protected_absolute_ticks(uint32_t ticks)
134 {
135 int_disable();
136
137 prevent_false_prev_evt();
138
139 set_absolute_ticks(ticks);
140
141 int_enable();
142 }
143
timer0_nrf_isr(void * arg)144 void timer0_nrf_isr(void *arg)
145 {
146 ARG_UNUSED(arg);
147 event_clear();
148
149
150 uint32_t t = get_comparator();
151 uint32_t dticks = counter_sub(t, last_count) / CYC_PER_TICK;
152
153 last_count += dticks * CYC_PER_TICK;
154
155 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
156 /* protection is not needed because we are in the TIMER interrupt
157 * so it won't get preempted by the interrupt.
158 */
159 set_absolute_ticks(last_count + CYC_PER_TICK);
160 }
161
162 sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? dticks : (dticks > 0));
163 }
164
sys_clock_set_timeout(int32_t ticks,bool idle)165 void sys_clock_set_timeout(int32_t ticks, bool idle)
166 {
167 ARG_UNUSED(idle);
168 uint32_t cyc;
169
170 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
171 return;
172 }
173
174 ticks = (ticks == K_TICKS_FOREVER) ? MAX_TICKS : ticks;
175 ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
176
177 uint32_t unannounced = counter_sub(counter(), last_count);
178
179 /* If we haven't announced for more than half the 24-bit wrap
180 * duration, then force an announce to avoid loss of a wrap
181 * event. This can happen if new timeouts keep being set
182 * before the existing one triggers the interrupt.
183 */
184 if (unannounced >= COUNTER_HALF_SPAN) {
185 ticks = 0;
186 }
187
188
189 /* Get the cycles from last_count to the tick boundary after
190 * the requested ticks have passed starting now.
191 */
192 cyc = ticks * CYC_PER_TICK + 1 + unannounced;
193 cyc += (CYC_PER_TICK - 1);
194 cyc = (cyc / CYC_PER_TICK) * CYC_PER_TICK;
195
196 /* Due to elapsed time the calculation above might produce a
197 * duration that laps the counter. Don't let it.
198 */
199 if (cyc > MAX_CYCLES) {
200 cyc = MAX_CYCLES;
201 }
202
203 cyc += last_count;
204 set_protected_absolute_ticks(cyc);
205
206 /* FIXME - QEMU requires clearing the events when setting the comparator,
207 * but the TIMER peripheral HW does not need this. Remove when fixed in
208 * QEMU.
209 */
210 event_clear();
211 NVIC_ClearPendingIRQ(TIMER0_IRQn);
212 }
213
sys_clock_elapsed(void)214 uint32_t sys_clock_elapsed(void)
215 {
216 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
217 return 0;
218 }
219
220 k_spinlock_key_t key = k_spin_lock(&lock);
221 uint32_t ret = counter_sub(counter(), last_count) / CYC_PER_TICK;
222
223 k_spin_unlock(&lock, key);
224 return ret;
225 }
226
sys_clock_cycle_get_32(void)227 uint32_t sys_clock_cycle_get_32(void)
228 {
229 k_spinlock_key_t key = k_spin_lock(&lock);
230 uint32_t ret = counter_sub(counter(), last_count) + last_count;
231
232 k_spin_unlock(&lock, key);
233 return ret;
234 }
235
sys_clock_driver_init(void)236 static int sys_clock_driver_init(void)
237 {
238 nrf_timer_prescaler_set(TIMER, NRF_TIMER_FREQ_1MHz);
239 nrf_timer_bit_width_set(TIMER, NRF_TIMER_BIT_WIDTH_32);
240
241 IRQ_CONNECT(TIMER0_IRQn, 1, timer0_nrf_isr, 0, 0);
242 irq_enable(TIMER0_IRQn);
243
244 nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_CLEAR);
245 nrf_timer_task_trigger(TIMER, NRF_TIMER_TASK_START);
246
247 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
248 set_comparator(counter() + CYC_PER_TICK);
249 }
250
251 event_clear();
252 NVIC_ClearPendingIRQ(TIMER0_IRQn);
253 int_enable();
254
255 return 0;
256 }
257
258 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
259 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
260
