1/*
2 * Copyright 2023 NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Note: File generated by gen_board_pinctrl.py
6 * from vmu_rt1170.mex, then updated manually
7 */
8
9#include <nxp/nxp_imx/rt/mimxrt1176dvmaa-pinctrl.dtsi>
10
11&pinctrl {
12	pinmux_enet1g: pinmux_enet1g {
13		group0 {
14			pinmux = <&iomuxc_gpio_disp_b1_00_enet_1g_rx_en>,
15				<&iomuxc_gpio_disp_b1_01_enet_1g_rx_er>;
16			drive-strength = "high";
17			bias-pull-down;
18			slew-rate = "fast";
19		};
20		group1 {
21			pinmux = <&iomuxc_gpio_emc_b2_15_enet_1g_rdata00>,
22				<&iomuxc_gpio_emc_b2_16_enet_1g_rdata01>;
23			drive-strength = "high";
24			bias-pull-down;
25			slew-rate = "fast";
26			input-enable;
27		};
28		group2 {
29			pinmux = <&iomuxc_gpio_disp_b1_09_enet_1g_tdata00>,
30				<&iomuxc_gpio_disp_b1_08_enet_1g_tdata01>,
31				<&iomuxc_gpio_disp_b1_10_enet_1g_tx_en>;
32			drive-strength = "high";
33			slew-rate = "fast";
34		};
35		group3 {
36			pinmux = <&iomuxc_gpio_disp_b1_11_enet_1g_ref_clk1>;
37			drive-strength = "high";
38			slew-rate = "fast";
39			input-enable;
40			bias-pull-down;
41		};
42	};
43
44	pinmux_enet1g_mdio: pinmux_enet1g_mdio {
45		group0 {
46			pinmux = <&iomuxc_gpio_emc_b2_19_enet_1g_mdc>,
47				<&iomuxc_gpio_emc_b2_20_enet_1g_mdio>;
48			drive-strength = "high";
49			slew-rate = "fast";
50		};
51		group1 {
52			pinmux = <&iomuxc_gpio_disp_b2_09_gpio_mux5_io10>;
53			drive-strength = "high";
54			bias-pull-down;
55			slew-rate = "fast";
56		};
57	};
58
59	pinmux_enet1g_ptp: pinmux_enet1g_ptp {
60	};
61
62	pinmux_flexcan1: pinmux_flexcan1 {
63		group0 {
64			pinmux = <&iomuxc_gpio_ad_07_can1_rx>,
65				<&iomuxc_gpio_ad_06_can1_tx>;
66			drive-strength = "high";
67			slew-rate = "fast";
68		};
69	};
70
71	pinmux_flexcan2: pinmux_flexcan2 {
72		group0 {
73			pinmux = <&iomuxc_gpio_ad_01_can2_rx>,
74				<&iomuxc_gpio_ad_00_can2_tx>;
75			drive-strength = "high";
76			slew-rate = "fast";
77		};
78	};
79
80	pinmux_flexcan3: pinmux_flexcan3 {
81		group0 {
82			pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>,
83				<&iomuxc_lpsr_gpio_lpsr_00_can3_tx>;
84			drive-strength = "high";
85			slew-rate = "fast";
86		};
87	};
88
89	/* pwm pins for vmu and io ports */
90	pinmux_flexpwm_vmu_ch1: pinmux_flexpwm_vmu_ch1 {
91		group0 {
92			pinmux = <&iomuxc_gpio_emc_b1_23_flexpwm1_pwm0_a>;
93			slew-rate = "fast";
94		};
95	};
96
97	pinmux_flexpwm_vmu_ch2: pinmux_flexpwm_vmu_ch2 {
98		group0 {
99			pinmux = <&iomuxc_gpio_emc_b1_25_flexpwm1_pwm1_a>;
100			slew-rate = "fast";
101		};
102	};
103
104	pinmux_flexpwm_vmu_ch3: pinmux_flexpwm_vmu_ch3 {
105		group0 {
106			pinmux = <&iomuxc_gpio_emc_b1_27_flexpwm1_pwm2_a>;
107			slew-rate = "fast";
108		};
109	};
110
111	pinmux_flexpwm_vmu_ch4: pinmux_flexpwm_vmu_ch4 {
112		group0 {
113			pinmux = <&iomuxc_gpio_emc_b1_06_flexpwm2_pwm0_a>;
114			slew-rate = "fast";
115		};
116	};
117
118	pinmux_flexpwm_vmu_ch5: pinmux_flexpwm_vmu_ch5 {
119		group0 {
120			pinmux = <&iomuxc_gpio_emc_b1_08_flexpwm2_pwm1_a>;
121			slew-rate = "fast";
122		};
123	};
124
125	pinmux_flexpwm_vmu_ch6: pinmux_flexpwm_vmu_ch6 {
126		group0 {
127			pinmux = <&iomuxc_gpio_emc_b1_10_flexpwm2_pwm2_a>;
128			slew-rate = "fast";
129		};
130	};
131
132	pinmux_flexpwm_vmu_ch7: pinmux_flexpwm_vmu_ch7 {
133		group0 {
134			pinmux = <&iomuxc_gpio_emc_b1_19_flexpwm2_pwm3_a>;
135			slew-rate = "fast";
136		};
137	};
138
139	pinmux_flexpwm_vmu_ch8: pinmux_flexpwm_vmu_ch8 {
140		group0 {
141			pinmux = <&iomuxc_gpio_emc_b1_29_flexpwm3_pwm0_a>;
142			slew-rate = "fast";
143		};
144	};
145
146	pinmux_user: pinmux_user {
147		group0 {
148			pinmux = <&iomuxc_gpio_emc_b1_24_gpio_mux1_io24>;
149		};
150	};
151
152	pinmux_flexspi1: pinmux_flexspi1 {
153		group0 {
154			pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_a_dqs>,
155				<&iomuxc_gpio_sd_b2_06_flexspi1_a_ss0_b>,
156				<&iomuxc_gpio_sd_b2_07_flexspi1_a_sclk>,
157				<&iomuxc_gpio_sd_b2_08_flexspi1_a_data00>,
158				<&iomuxc_gpio_sd_b2_09_flexspi1_a_data01>,
159				<&iomuxc_gpio_sd_b2_10_flexspi1_a_data02>,
160				<&iomuxc_gpio_sd_b2_11_flexspi1_a_data03>;
161			bias-pull-down;
162			input-enable;
163		};
164	};
165
166	pinmux_gpt_ppm: pinmux_gpt_ppm {
167		group0 {
168			pinmux = <&iomuxc_gpio_emc_b1_09_gpt5_capture1>;
169			drive-strength = "high";
170			slew-rate = "fast";
171		};
172	};
173
174	pinmux_qtmr_pwm_buzzer: pinmux_qtmr_pwm_buzzer {
175		group0 {
176			pinmux = <&iomuxc_gpio_emc_b2_09_qtimer1_timer0>;
177			drive-strength = "high";
178			slew-rate = "fast";
179		};
180	};
181
182	pinmux_lpadc1: pinmux_lpadc1 {
183		group0 {
184			pinmux = <&iomuxc_gpio_ad_10_adc1_ch2a>;
185			drive-strength = "normal";
186			slew-rate = "slow";
187		};
188	};
189
190	pinmux_lpi2c1: pinmux_lpi2c1 {
191		group0 {
192			pinmux = <&iomuxc_gpio_ad_08_lpi2c1_scl>,
193				<&iomuxc_gpio_ad_09_lpi2c1_sda>;
194			drive-strength = "normal";
195			drive-open-drain;
196			slew-rate = "fast";
197			input-enable;
198		};
199	};
200
201	pinmux_lpi2c2: pinmux_lpi2c2 {
202		group0 {
203			pinmux = <&iomuxc_gpio_ad_18_lpi2c2_scl>,
204				<&iomuxc_gpio_ad_19_lpi2c2_sda>,
205				<&iomuxc_gpio_emc_b1_35_gpio_mux2_io03>;
206			drive-strength = "normal";
207			drive-open-drain;
208			slew-rate = "fast";
209			input-enable;
210		};
211	};
212
213	pinmux_lpi2c3: pinmux_lpi2c3 {
214		group0 {
215			pinmux = <&iomuxc_gpio_disp_b2_10_lpi2c3_scl>,
216				<&iomuxc_gpio_disp_b2_11_lpi2c3_sda>;
217			drive-strength = "normal";
218			drive-open-drain;
219			slew-rate = "fast";
220			input-enable;
221		};
222	};
223
224	pinmux_lpi2c6: pinmux_lpi2c6 {
225		group0 {
226			pinmux = <&iomuxc_lpsr_gpio_lpsr_07_lpi2c6_scl>,
227				<&iomuxc_lpsr_gpio_lpsr_06_lpi2c6_sda>;
228			drive-strength = "normal";
229			drive-open-drain;
230			slew-rate = "fast";
231			input-enable;
232		};
233	};
234
235	pinmux_lpspi1: pinmux_lpspi1 {
236		group0 {
237			pinmux = <&iomuxc_gpio_emc_b2_01_gpio_mux2_io11>,
238				<&iomuxc_gpio_emc_b2_00_lpspi1_sck>,
239				<&iomuxc_gpio_emc_b2_03_lpspi1_sdi>,
240				<&iomuxc_gpio_emc_b2_02_lpspi1_sdo>,
241				<&iomuxc_gpio_ad_20_gpio_mux3_io19>;
242			drive-strength = "high";
243			slew-rate = "fast";
244		};
245	};
246
247	pinmux_lpspi2: pinmux_lpspi2 {
248		group0 {
249			pinmux = <&iomuxc_gpio_ad_25_gpio_mux3_io24>,
250				<&iomuxc_gpio_ad_24_lpspi2_sck>,
251				<&iomuxc_gpio_ad_27_lpspi2_sdi>,
252				<&iomuxc_gpio_ad_26_lpspi2_sdo>,
253				<&iomuxc_gpio_emc_b1_39_gpio_mux2_io07>;
254			drive-strength = "high";
255			slew-rate = "fast";
256		};
257	};
258
259	pinmux_lpspi3: pinmux_lpspi3 {
260		group0 {
261			pinmux = <&iomuxc_gpio_emc_b2_04_lpspi3_sck>,
262				<&iomuxc_gpio_emc_b2_07_lpspi3_sdi>,
263				<&iomuxc_gpio_emc_b2_06_lpspi3_sdo>,
264				<&iomuxc_gpio_emc_b2_05_gpio_mux2_io15>,
265				<&iomuxc_gpio_emc_b2_08_gpio_mux2_io18>,
266				<&iomuxc_gpio_ad_21_gpio_mux3_io20>,
267				<&iomuxc_gpio_emc_b2_18_gpio_mux2_io28>;
268			drive-strength = "high";
269			slew-rate = "fast";
270		};
271	};
272
273	pinmux_lpspi6: pinmux_lpspi6 {
274		group0 {
275			pinmux = <&iomuxc_lpsr_gpio_lpsr_09_lpspi6_pcs0>,
276				<&iomuxc_lpsr_gpio_lpsr_10_lpspi6_sck>,
277				<&iomuxc_lpsr_gpio_lpsr_12_lpspi6_sdi>,
278				<&iomuxc_lpsr_gpio_lpsr_11_lpspi6_sdo>;
279			drive-strength = "high";
280			slew-rate = "fast";
281		};
282	};
283
284	pinmux_lpuart1: pinmux_lpuart1 {
285		group0 {
286			pinmux = <&iomuxc_gpio_disp_b1_03_lpuart1_rx>,
287				<&iomuxc_gpio_disp_b1_02_lpuart1_tx>;
288			drive-strength = "high";
289			bias-pull-up;
290			slew-rate = "fast";
291		};
292	};
293
294	pinmux_lpuart3: pinmux_lpuart3 {
295		group0 {
296			pinmux = <&iomuxc_gpio_ad_31_lpuart3_rx>,
297				<&iomuxc_gpio_ad_30_lpuart3_tx>;
298			drive-strength = "high";
299			bias-pull-up;
300			slew-rate = "fast";
301		};
302	};
303
304	pinmux_lpuart4: pinmux_lpuart4 {
305		group0 {
306			pinmux = <&iomuxc_gpio_disp_b1_04_lpuart4_rx>,
307				<&iomuxc_gpio_disp_b1_06_lpuart4_tx>;
308			drive-strength = "high";
309			bias-pull-up;
310			slew-rate = "fast";
311		};
312	};
313
314	pinmux_lpuart5: pinmux_lpuart5 {
315		group0 {
316			pinmux = <&iomuxc_gpio_ad_29_lpuart5_rx>,
317				<&iomuxc_gpio_ad_28_lpuart5_tx>;
318			drive-strength = "high";
319			bias-pull-up;
320			slew-rate = "fast";
321		};
322	};
323
324	pinmux_lpuart6: pinmux_lpuart6 {
325		group0 {
326			pinmux = <&iomuxc_gpio_emc_b1_41_lpuart6_rx>,
327				<&iomuxc_gpio_emc_b1_40_lpuart6_tx>;
328			drive-strength = "high";
329			bias-pull-up;
330			slew-rate = "fast";
331		};
332	};
333
334	pinmux_lpuart8: pinmux_lpuart8 {
335		group0 {
336			pinmux = <&iomuxc_gpio_ad_03_lpuart8_rx>,
337				<&iomuxc_gpio_ad_02_lpuart8_tx>;
338			drive-strength = "high";
339			bias-pull-up;
340			slew-rate = "fast";
341		};
342	};
343
344	pinmux_lpuart10: pinmux_lpuart10 {
345		group0 {
346			pinmux = <&iomuxc_gpio_ad_33_lpuart10_rx>,
347				<&iomuxc_gpio_ad_15_lpuart10_tx>;
348			drive-strength = "high";
349			bias-pull-up;
350			slew-rate = "fast";
351		};
352	};
353
354	pinmux_lpuart11: pinmux_lpuart11 {
355		group0 {
356			pinmux = <&iomuxc_lpsr_gpio_lpsr_05_lpuart11_rx>,
357				<&iomuxc_lpsr_gpio_lpsr_04_lpuart11_tx>;
358			drive-strength = "high";
359			bias-pull-up;
360			slew-rate = "fast";
361		};
362	};
363
364	pinmux_usdhc1: pinmux_usdhc1 {
365		group0 {
366			pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>,
367				<&iomuxc_gpio_sd_b1_02_usdhc1_data0>,
368				<&iomuxc_gpio_sd_b1_03_usdhc1_data1>,
369				<&iomuxc_gpio_sd_b1_04_usdhc1_data2>,
370				<&iomuxc_gpio_sd_b1_05_usdhc1_data3>,
371				<&iomuxc_gpio_sd_b1_01_usdhc1_clk>;
372			bias-pull-up;
373			input-enable;
374		};
375	};
376
377};
378