1 /*
2  * Copyright (c) 2019, MADMACHINE LIMITED
3  * Copyright 2024 NXP
4  *
5  * refer to hal_nxp board file
6  *
7  * SPDX-License-Identifier: Apache-2.0
8  */
9 
10 #include <zephyr/init.h>
11 #include <flexspi_nor_config.h>
12 
13 /*!
14  * @brief ROM API init
15  *
16  * Get the bootloader api entry address.
17  */
18 void ROM_API_Init(void);
19 
20 /*!
21  * @brief Initialize Serial NOR devices via FLEXSPI
22  *
23  * This function checks and initializes the FLEXSPI module for the other FLEXSPI APIs.
24  *
25  * @param instance storage the instance of FLEXSPI.
26  * @param config A pointer to the storage for the driver runtime state.
27  *
28  * @retval kStatus_Success Api was executed successfully.
29  * @retval kStatus_InvalidArgument A invalid argument is provided.
30  * @retval kStatus_ROM_FLEXSPI_InvalidSequence A invalid Sequence is provided.
31  * @retval kStatus_ROM_FLEXSPI_SequenceExecutionTimeout Sequence Execution timeout.
32  * @retval kStatus_ROM_FLEXSPI_DeviceTimeout the device timeout
33  */
34 status_t ROM_FLEXSPI_NorFlash_Init(uint32_t instance, struct flexspi_nor_config_t *config);
35 
36 
37 
38 #ifdef CONFIG_NXP_IMXRT_BOOT_HEADER
39 #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
40 __attribute__((section(".boot_hdr.conf")))
41 #elif defined(__ICCARM__)
42 #pragma location = ".boot_hdr.conf"
43 #endif
44 
45 /* Config used for booting */
46 
47 const struct flexspi_nor_config_t Qspiflash_config = {
48 	.memConfig = {
49 		.tag = FLEXSPI_CFG_BLK_TAG,
50 		.version = FLEXSPI_CFG_BLK_VERSION,
51 		.readSampleClkSrc =
52 			kFlexSPIReadSampleClk_LoopbackInternally,
53 		.csHoldTime = 1u,
54 		.csSetupTime = 1u,
55 		.sflashPadType = kSerialFlash_1Pad,
56 		.serialClkFreq = kFlexSpiSerialClk_80MHz,
57 		.sflashA1Size = 64u * 1024u * 1024u,
58 		.lookupTable = {
59 			FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
60 					0x03, RADDR_SDR,
61 					FLEXSPI_1PAD, 0x18),
62 			FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_1PAD,
63 					0x04, STOP,
64 					FLEXSPI_1PAD, 0),
65 		},
66 	},
67 	.pageSize = 256u,
68 	.sectorSize = 4u * 1024u,
69 	.blockSize = 64u * 1024u,
70 	.isUniformBlockSize = false,
71 };
72 #endif /* CONFIG_NXP_IMXRT_BOOT_HEADER */
73 
74 /* Config used for code execution */
75 const struct flexspi_nor_config_t g_flash_fast_config = {
76 	.memConfig = {
77 		.tag                 = FLEXSPI_CFG_BLK_TAG,
78 		.version             = FLEXSPI_CFG_BLK_VERSION,
79 		.readSampleClkSrc    = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
80 		.csHoldTime          = 1,
81 		.csSetupTime         = 1,
82 		.deviceModeCfgEnable = 1,
83 		.deviceModeType      = kDeviceConfigCmdType_Spi2Xpi,
84 		.waitTimeCfgCommands = 1,
85 		.deviceModeSeq = {
86 			.seqNum   = 1,
87 			.seqId    = 6, /* See Lookup table for more details */
88 			.reserved = 0,
89 		},
90 		.deviceModeArg = 2, /* Enable OPI DDR mode */
91 		.controllerMiscOption =
92 		(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable)
93 			| (1u << kFlexSpiMiscOffset_DdrModeEnable),
94 		.deviceType    = kFlexSpiDeviceType_SerialNOR,
95 		.sflashPadType = kSerialFlash_8Pads,
96 		.serialClkFreq = kFlexSpiSerialClk_200MHz,
97 		.sflashA1Size  = 64ul * 1024u * 1024u,
98 		.busyOffset      = 0u,
99 		.busyBitPolarity = 0u,
100 		.lookupTable = {
101 			/* Read */
102 			[0 + 0] = FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD,
103 				0xEE, CMD_DDR, FLEXSPI_8PAD, 0x11),
104 			[0 + 1] = FLEXSPI_LUT_SEQ(RADDR_DDR, FLEXSPI_8PAD,
105 				0x20, DUMMY_DDR, FLEXSPI_8PAD, 0x28),
106 			[0 + 2] = FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD,
107 				0x04, STOP, FLEXSPI_1PAD, 0x00),
108 
109 			/* Write enable SPI */
110 			[4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
111 				0x06, STOP, FLEXSPI_1PAD, 0x00),
112 
113 			/*Write Configuration Register 2 =01, Enable OPI DDR mode*/
114 			[4 * 6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
115 				0x72, CMD_SDR, FLEXSPI_1PAD, 0x00),
116 			[4 * 6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
117 				0x00, CMD_SDR, FLEXSPI_1PAD, 0x00),
118 			[4 * 6 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD,
119 				0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01),
120 
121 		},
122 	},
123 	.pageSize           = 256u,
124 	.sectorSize         = 4u * 1024u,
125 	.blockSize          = 64u * 1024u,
126 	.isUniformBlockSize = false,
127 	.ipcmdSerialClkFreq = 1,
128 	.serialNorType = 2,
129 	.reserve2[0] = 0x7008200,
130 };
131 
132 
imxrt_reclock_initialize(void)133 __ramfunc int imxrt_reclock_initialize(void)
134 {
135 	const uint32_t instance =  1;
136 
137 	volatile struct flexspi_nor_config_t bootConfig;
138 
139 	memcpy((struct flexspi_nor_config_t *)&bootConfig, &g_flash_fast_config,
140 	       sizeof(struct flexspi_nor_config_t));
141 	bootConfig.memConfig.tag = FLEXSPI_CFG_BLK_TAG;
142 
143 	ROM_API_Init();
144 
145 	ROM_FLEXSPI_NorFlash_Init(instance, (struct flexspi_nor_config_t *)&bootConfig);
146 
147 	return 0;
148 }
149 
150 SYS_INIT(imxrt_reclock_initialize,  PRE_KERNEL_1, 0);
151