1# MIMXRT595-EVK board
2
3# Copyright 2022-2023, NXP
4# SPDX-License-Identifier: Apache-2.0
5
6if BOARD_MIMXRT595_EVK_MIMXRT595S_CM33
7
8config FLASH_MCUX_FLEXSPI_MX25UM51345G
9	default y if FLASH
10
11config FXOS8700_DRDY_INT1
12	default y
13	depends on FXOS8700_TRIGGER
14
15if DMA_MCUX_LPC
16
17# Memory from the heap pool is used to allocate DMA descriptors for
18# channels that use multiple blocks for a DMA transfer.
19# Adjust HEAP_MEM_POOL_MIN_SIZE in case you need more memory.
20config HEAP_MEM_POOL_ADD_SIZE_BOARD
21	int
22	default 4096
23
24endif # DMA_MCUX_LPC
25
26# Turn on Device Level Power Management as we wish
27# to reconfigure the FlexSPI pins for power savings
28# when transitioning the SoC to Deep Low Power modes.
29config PM_DEVICE
30	default y if PM
31
32config REGULATOR
33	default y if PM || POWEROFF
34
35endif # BOARD_MIMXRT595_EVK_MIMXRT595S_CM33
36