1/*
2 * Copyright 2024 NXP
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 */
6
7#include <nxp/nxp_imx/rt/mimxrt1189cvm8b-pinctrl.dtsi>
8
9&pinctrl {
10	emdio_default: emdio_default {
11		group1 {
12			pinmux = <&iomuxc_gpio_ad_30_netc_emdc>,
13				<&iomuxc_gpio_ad_31_netc_emdio>;
14			bias-pull-down;
15			slew-rate = "fast";
16			drive-strength = "high";
17		};
18	};
19
20	eth4_default: eth4_default {
21		group1 {
22			pinmux = <&iomuxc_gpio_emc_b2_13_eth4_tx_data0>,
23				<&iomuxc_gpio_emc_b2_14_eth4_tx_data1>,
24				<&iomuxc_gpio_emc_b2_15_eth4_tx_en>,
25				<&iomuxc_gpio_emc_b2_17_eth4_rx_data0>,
26				<&iomuxc_gpio_emc_b2_18_eth4_rx_data1>,
27				<&iomuxc_gpio_emc_b2_19_eth4_rx_en>,
28				<&iomuxc_gpio_emc_b2_20_eth4_rx_er>;
29			bias-pull-down;
30			slew-rate = "fast";
31			drive-strength = "high";
32		};
33		group2 {
34			pinmux = <&iomuxc_gpio_emc_b2_16_eth4_tx_clk>;
35			input-enable;
36			bias-pull-down;
37			slew-rate = "fast";
38			drive-strength = "high";
39		};
40	};
41
42	pinmux_lpspi3: pinmux_lpspi3 {
43		group0 {
44			pinmux = <&iomuxc_gpio_sd_b1_00_lpspi3_pcs0>,
45				<&iomuxc_gpio_sd_b1_01_lpspi3_sck>,
46				<&iomuxc_gpio_sd_b1_02_lpspi3_sout>,
47				<&iomuxc_gpio_sd_b1_03_lpspi3_sin>;
48			drive-strength = "high";
49			slew-rate = "fast";
50		};
51	};
52
53	pinmux_lpuart1: pinmux_lpuart1 {
54		group0 {
55			pinmux = <&iomuxc_aon_gpio_aon_09_lpuart1_rxd>,
56				<&iomuxc_aon_gpio_aon_08_lpuart1_txd>;
57			drive-strength = "high";
58			slew-rate = "fast";
59		};
60	};
61
62	pinmux_lpuart1_sleep: pinmux_lpuart1_sleep {
63		group0 {
64			pinmux = <&iomuxc_aon_gpio_aon_09_gpio1_io09>;
65			drive-strength = "high";
66			bias-pull-up;
67			slew-rate = "fast";
68		};
69		group1 {
70			pinmux = <&iomuxc_aon_gpio_aon_08_lpuart1_txd>;
71			drive-strength = "high";
72			slew-rate = "fast";
73		};
74	};
75
76	/* Connected to FXLS8974 */
77	pinmux_lpi2c2: pinmux_lpi2c2 {
78		group0 {
79			pinmux = <&iomuxc_aon_gpio_aon_15_lpi2c2_sda>,
80				<&iomuxc_aon_gpio_aon_16_lpi2c2_scl>;
81			drive-strength = "normal";
82			drive-open-drain;
83			slew-rate = "fast";
84			input-enable;
85		};
86	};
87
88	pinmux_lpi2c3: pinmux_lpi2c3 {
89		group0 {
90			pinmux = <&iomuxc_gpio_ad_18_lpi2c3_scl>,
91				<&iomuxc_gpio_ad_19_lpi2c3_sda>;
92			drive-strength = "normal";
93			drive-open-drain;
94			slew-rate = "fast";
95			input-enable;
96		};
97	};
98
99	pinmux_lpadc1: pinmux_lpadc1 {
100		group0 {
101			pinmux = <&iomuxc_gpio_ad_16_adc1_ch0a>,
102				<&iomuxc_gpio_ad_14_adc1_ch1a>;
103			drive-strength = "high";
104			bias-pull-down;
105			slew-rate = "fast";
106		};
107	};
108
109	/* Need to weld pin header on J35 */
110	pinmux_flexcan3: pinmux_flexcan3 {
111		group0 {
112			pinmux = <&iomuxc_aon_gpio_aon_03_flexcan3_rx>,
113				<&iomuxc_aon_gpio_aon_18_flexcan3_tx>;
114			drive-strength = "high";
115			slew-rate = "fast";
116		};
117	};
118
119	pinmux_flexspi1: pinmux_flexspi1 {
120		group0 {
121			pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_b_dqs>,
122				<&iomuxc_gpio_sd_b2_06_flexspi1_b_ss0_b>,
123				<&iomuxc_gpio_sd_b2_07_flexspi1_b_sclk>,
124				<&iomuxc_gpio_sd_b2_08_flexspi1_b_data0>,
125				<&iomuxc_gpio_sd_b2_09_flexspi1_b_data1>,
126				<&iomuxc_gpio_sd_b2_10_flexspi1_b_data2>,
127				<&iomuxc_gpio_sd_b2_11_flexspi1_b_data3>;
128			bias-pull-down;
129			input-enable;
130		};
131	};
132
133	pinmux_flexpwm2: pinmux_flexpwm2 {
134		group0 {
135			pinmux = <&iomuxc_gpio_ad_27_flexpwm2_pwm1_b>;
136			drive-strength = "high";
137			slew-rate = "fast";
138		};
139	};
140
141	pinmux_tpm5: pinmux_tpm5 {
142		group0 {
143			pinmux = <&iomuxc_gpio_b1_00_tpm5_ch0>;
144			drive-strength = "normal";
145			slew-rate = "slow";
146		};
147	};
148
149	pinmux_i3c2: pinmux_i3c2 {
150		group0 {
151			pinmux = <&iomuxc_gpio_ad_18_i3c2_scl>,
152				<&iomuxc_gpio_ad_19_i3c2_sda>;
153			drive-strength = "normal";
154			drive-open-drain;
155			slew-rate = "fast";
156			input-enable;
157		};
158
159		group1 {
160			pinmux = <&iomuxc_gpio_ad_17_i3c2_pur>;
161			slew-rate = "fast";
162			drive-strength = "high";
163		};
164	};
165};
166