1/* 2 * Copyright (c) 2022, NXP 3 * SPDX-License-Identifier: Apache-2.0 4 * 5 * Note: File generated by gen_board_pinctrl.py 6 * from mimxrt1170_evk.mex 7 */ 8 9#include <nxp/nxp_imx/rt/mimxrt1176dvmaa-pinctrl.dtsi> 10 11&pinctrl { 12 /* conflicts with fxos8700 sensor */ 13 pinmux_csi: pinmux_csi { 14 group0 { 15 pinmux = <&iomuxc_gpio_disp_b2_14_gpio11_io15>; 16 drive-strength = "high"; 17 bias-pull-down; 18 slew-rate = "fast"; 19 }; 20 group1 { 21 pinmux = <&iomuxc_gpio_ad_26_gpio9_io25>; 22 drive-strength = "high"; 23 bias-pull-up; 24 slew-rate = "fast"; 25 }; 26 }; 27 28 pinmux_lpi2c6: pinmux_lpi2c6 { 29 group0 { 30 pinmux = <&iomuxc_lpsr_gpio_lpsr_07_lpi2c6_scl>, 31 <&iomuxc_lpsr_gpio_lpsr_06_lpi2c6_sda>; 32 drive-strength = "high"; 33 slew-rate = "fast"; 34 input-enable; 35 }; 36 }; 37 38 pinmux_enet: pinmux_enet { 39 group0 { 40 pinmux = <&iomuxc_gpio_ad_12_gpio9_io11>, 41 <&iomuxc_gpio_disp_b2_08_enet_rx_en>, 42 <&iomuxc_gpio_disp_b2_09_enet_rx_er>; 43 drive-strength = "high"; 44 bias-pull-down; 45 slew-rate = "fast"; 46 }; 47 group1 { 48 pinmux = <&iomuxc_gpio_disp_b2_06_enet_rdata00>, 49 <&iomuxc_gpio_disp_b2_07_enet_rdata01>; 50 drive-strength = "high"; 51 bias-pull-down; 52 slew-rate = "fast"; 53 input-enable; 54 }; 55 group2 { 56 pinmux = <&iomuxc_lpsr_gpio_lpsr_12_gpio12_io12>; 57 drive-strength = "high"; 58 bias-pull-up; 59 slew-rate = "fast"; 60 }; 61 group3 { 62 pinmux = <&iomuxc_gpio_disp_b2_02_enet_tdata00>, 63 <&iomuxc_gpio_disp_b2_03_enet_tdata01>, 64 <&iomuxc_gpio_disp_b2_04_enet_tx_en>; 65 drive-strength = "high"; 66 slew-rate = "fast"; 67 }; 68 group4 { 69 pinmux = <&iomuxc_gpio_disp_b2_05_enet_ref_clk>; 70 drive-strength = "high"; 71 slew-rate = "slow"; 72 input-enable; 73 }; 74 }; 75 76 pinmux_enet_mdio: pinmux_enet_mdio { 77 group0 { 78 pinmux = <&iomuxc_gpio_ad_32_enet_mdc>, 79 <&iomuxc_gpio_ad_33_enet_mdio>; 80 drive-strength = "high"; 81 slew-rate = "fast"; 82 }; 83 }; 84 85 pinmux_ptp: pinmux_ptp { 86 }; 87 88 pinmux_enet1g: pinmux_enet1g { 89 group0 { 90 pinmux = <&iomuxc_gpio_disp_b1_11_enet_1g_tx_clk_io>, // ENET_RGMII_TXC 91 <&iomuxc_gpio_disp_b1_01_enet_1g_rx_clk>; // ENET_RGMII_RXC 92 bias-disable; 93 drive-strength = "high"; 94 slew-rate = "fast"; 95 input-enable; 96 }; 97 group1 { 98 pinmux = <&iomuxc_gpio_disp_b1_09_enet_1g_tdata00>, // ENET_RGMII_TXD0 99 <&iomuxc_gpio_disp_b1_08_enet_1g_tdata01>, // ENET_RGMII_TXD1 100 <&iomuxc_gpio_disp_b1_07_enet_1g_tdata02>, // ENET_RGMII_TXD2 101 <&iomuxc_gpio_disp_b1_06_enet_1g_tdata03>, // ENET_RGMII_TXD3 102 <&iomuxc_gpio_disp_b1_10_enet_1g_tx_en>; // ENET_RGMII_TX_EN 103 drive-strength = "high"; 104 bias-pull-up; 105 slew-rate = "fast"; 106 }; 107 group2 { 108 pinmux = <&iomuxc_gpio_disp_b1_02_enet_1g_rdata00>, // ENET_RGMII_RXD0 109 <&iomuxc_gpio_disp_b1_03_enet_1g_rdata01>, // ENET_RGMII_RXD1 110 <&iomuxc_gpio_disp_b1_04_enet_1g_rdata02>, // ENET_RGMII_RXD2 111 <&iomuxc_gpio_disp_b1_05_enet_1g_rdata03>, // ENET_RGMII_RXD3 112 <&iomuxc_gpio_disp_b1_00_enet_1g_rx_en>; // ENET_RGMII_RX_EN 113 drive-strength = "high"; 114 bias-pull-down; 115 slew-rate = "fast"; 116 input-enable; 117 }; 118 }; 119 120 pinmux_enet1g_mdio: pinmux_enet1g_mdio { 121 group0 { 122 pinmux = <&iomuxc_gpio_disp_b2_13_gpio11_io14>; // ETHPHY_RST_B 123 drive-strength = "high"; 124 bias-pull-down; 125 slew-rate = "slow"; 126 }; 127 group1 { 128 pinmux = <&iomuxc_gpio_disp_b2_12_gpio_mux5_io13>; // RGMII1_PHY_INTB 129 drive-strength = "high"; 130 bias-pull-down; 131 slew-rate = "fast"; 132 input-enable; 133 }; 134 group2 { 135 pinmux = <&iomuxc_gpio_emc_b2_19_enet_1g_mdc>, // ENET_RGMII_MDC 136 <&iomuxc_gpio_emc_b2_20_enet_1g_mdio>; // ENET_RGMII_MDIO 137 drive-strength = "high"; 138 bias-pull-down; 139 slew-rate = "fast"; 140 }; 141 }; 142 143 pinmux_enet1g_ptp: pinmux_enet1g_ptp { 144 }; 145 146 pinmux_flexcan3: pinmux_flexcan3 { 147 group0 { 148 pinmux = <&iomuxc_lpsr_gpio_lpsr_01_can3_rx>, 149 <&iomuxc_lpsr_gpio_lpsr_00_can3_tx>; 150 drive-strength = "high"; 151 slew-rate = "fast"; 152 }; 153 }; 154 155 pinmux_flexpwm1: pinmux_flexpwm1 { 156 group0 { 157 pinmux = <&iomuxc_gpio_ad_04_flexpwm1_pwm2_a>; 158 drive-strength = "high"; 159 slew-rate = "fast"; 160 }; 161 }; 162 163 pinmux_flexspi1: pinmux_flexspi1 { 164 group0 { 165 pinmux = <&iomuxc_gpio_sd_b2_05_flexspi1_a_dqs>, 166 <&iomuxc_gpio_sd_b2_06_flexspi1_a_ss0_b>, 167 <&iomuxc_gpio_sd_b2_07_flexspi1_a_sclk>, 168 <&iomuxc_gpio_sd_b2_08_flexspi1_a_data00>, 169 <&iomuxc_gpio_sd_b2_09_flexspi1_a_data01>, 170 <&iomuxc_gpio_sd_b2_10_flexspi1_a_data02>, 171 <&iomuxc_gpio_sd_b2_11_flexspi1_a_data03>; 172 bias-pull-down; 173 input-enable; 174 }; 175 }; 176 177 /* interrupt gpios for fxos8700 */ 178 pinmux_fxos8700_int: pinmux_fxos8700_int { 179 group0 { 180 pinmux = <&iomuxc_gpio_disp_b2_14_gpio11_io15>, 181 <&iomuxc_gpio_disp_b2_13_gpio11_io14>; 182 drive-strength = "high"; 183 slew-rate = "fast"; 184 }; 185 }; 186 187 /* conflicts with lpspi1 */ 188 pinmux_lcdif: pinmux_lcdif { 189 group0 { 190 pinmux = <&iomuxc_gpio_ad_30_gpio9_io29>, 191 <&iomuxc_gpio_ad_02_gpio9_io01>; 192 drive-strength = "high"; 193 bias-pull-down; 194 slew-rate = "fast"; 195 }; 196 group1 { 197 pinmux = <&iomuxc_gpio_disp_b2_15_gpio11_io16>; 198 drive-strength = "high"; 199 bias-pull-up; 200 slew-rate = "fast"; 201 }; 202 }; 203 204 pinmux_lpadc0: pinmux_lpadc0 { 205 group0 { 206 pinmux = <&iomuxc_gpio_ad_06_adc1_ch0a>; 207 drive-strength = "high"; 208 bias-pull-down; 209 slew-rate = "fast"; 210 }; 211 }; 212 213 pinmux_lpi2c1: pinmux_lpi2c1 { 214 group0 { 215 pinmux = <&iomuxc_gpio_ad_08_lpi2c1_scl>, 216 <&iomuxc_gpio_ad_09_lpi2c1_sda>; 217 drive-strength = "normal"; 218 drive-open-drain; 219 slew-rate = "fast"; 220 input-enable; 221 }; 222 }; 223 224 /* Connected to FXOS8700 */ 225 pinmux_lpi2c5: pinmux_lpi2c5 { 226 group0 { 227 pinmux = <&iomuxc_lpsr_gpio_lpsr_05_lpi2c5_scl>, 228 <&iomuxc_lpsr_gpio_lpsr_04_lpi2c5_sda>; 229 drive-strength = "normal"; 230 drive-open-drain; 231 slew-rate = "fast"; 232 input-enable; 233 }; 234 }; 235 236 pinmux_lpspi1: pinmux_lpspi1 { 237 group0 { 238 pinmux = <&iomuxc_gpio_ad_29_lpspi1_pcs0>, 239 <&iomuxc_gpio_ad_28_lpspi1_sck>, 240 <&iomuxc_gpio_ad_31_lpspi1_sdi>, 241 <&iomuxc_gpio_ad_30_lpspi1_sdo>; 242 drive-strength = "high"; 243 slew-rate = "fast"; 244 }; 245 }; 246 247 pinmux_lpuart1: pinmux_lpuart1 { 248 group0 { 249 pinmux = <&iomuxc_gpio_ad_25_lpuart1_rx>, 250 <&iomuxc_gpio_ad_24_lpuart1_tx>; 251 drive-strength = "high"; 252 slew-rate = "fast"; 253 }; 254 }; 255 256 pinmux_lpuart1_sleep: pinmux_lpuart1_sleep { 257 group0 { 258 pinmux = <&iomuxc_gpio_ad_25_gpio_mux3_io24>; 259 drive-strength = "high"; 260 bias-pull-up; 261 slew-rate = "fast"; 262 }; 263 group1 { 264 pinmux = <&iomuxc_gpio_ad_24_lpuart1_tx>; 265 drive-strength = "high"; 266 slew-rate = "fast"; 267 }; 268 }; 269 270 pinmux_lpuart2: pinmux_lpuart2 { 271 group0 { 272 pinmux = <&iomuxc_gpio_disp_b2_11_lpuart2_rx>, 273 <&iomuxc_gpio_disp_b2_10_lpuart2_tx>; 274 drive-strength = "high"; 275 slew-rate = "fast"; 276 }; 277 }; 278 279 pinmux_lpuart2_sleep: pinmux_lpuart2_sleep { 280 group0 { 281 pinmux = <&iomuxc_gpio_disp_b2_11_gpio_mux5_io12>; 282 drive-strength = "high"; 283 bias-pull-up; 284 slew-rate = "fast"; 285 }; 286 group1 { 287 pinmux = <&iomuxc_gpio_disp_b2_10_lpuart2_tx>; 288 drive-strength = "high"; 289 slew-rate = "fast"; 290 }; 291 }; 292 293 pinmux_lpuart2_flowcontrol: pinmux_lpuart2_flowcontrol { 294 group0 { 295 pinmux = <&iomuxc_gpio_disp_b2_11_lpuart2_rx>, 296 <&iomuxc_gpio_disp_b2_10_lpuart2_tx>, 297 <&iomuxc_gpio_disp_b2_12_lpuart2_cts_b>, 298 <&iomuxc_gpio_disp_b2_13_lpuart2_rts_b>; 299 drive-strength = "high"; 300 slew-rate = "fast"; 301 }; 302 }; 303 304 pinmux_sai1: pinmux_sai1 { 305 group0 { 306 pinmux = <&iomuxc_gpio_ad_17_sai1_mclk>, 307 <&iomuxc_gpio_ad_18_sai1_rx_sync>, 308 <&iomuxc_gpio_ad_19_sai1_rx_bclk>, 309 <&iomuxc_gpio_ad_20_sai1_rx_data00>, 310 <&iomuxc_gpio_ad_21_sai1_tx_data00>, 311 <&iomuxc_gpio_ad_22_sai1_tx_bclk>, 312 <&iomuxc_gpio_ad_23_sai1_tx_sync>; 313 drive-strength = "high"; 314 slew-rate = "fast"; 315 input-enable; 316 }; 317 }; 318 319 pinmux_sai4: pinmux_sai4 { 320 group0 { 321 pinmux = <&iomuxc_lpsr_gpio_lpsr_09_sai4_tx_data>, 322 <&iomuxc_lpsr_gpio_lpsr_10_sai4_tx_sync>, 323 <&iomuxc_lpsr_gpio_lpsr_12_sai4_tx_bclk>; 324 drive-strength = "high"; 325 slew-rate = "fast"; 326 input-enable; 327 }; 328 }; 329 330 /* conflicts with enet pins */ 331 pinmux_usdhc1: pinmux_usdhc1 { 332 group0 { 333 pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>, 334 <&iomuxc_gpio_sd_b1_01_usdhc1_clk>, 335 <&iomuxc_gpio_sd_b1_02_usdhc1_data0>, 336 <&iomuxc_gpio_sd_b1_03_usdhc1_data1>, 337 <&iomuxc_gpio_sd_b1_04_usdhc1_data2>, 338 <&iomuxc_gpio_sd_b1_05_usdhc1_data3>; 339 bias-pull-up; 340 input-enable; 341 }; 342 group1 { 343 pinmux = <&iomuxc_gpio_ad_34_usdhc1_vselect>, 344 <&iomuxc_gpio_ad_32_gpio_mux3_io31_cm7>; 345 drive-strength = "high"; 346 bias-pull-down; 347 slew-rate = "fast"; 348 }; 349 group2 { 350 pinmux = <&iomuxc_gpio_ad_35_gpio10_io02>; 351 drive-strength = "high"; 352 bias-pull-up; 353 slew-rate = "fast"; 354 }; 355 }; 356 357 /* removes pull on dat3 for card detect */ 358 pinmux_usdhc1_dat3_nopull: pinmux_usdhc1_dat3_nopull { 359 group0 { 360 pinmux = <&iomuxc_gpio_sd_b1_05_usdhc1_data3>; 361 bias-disable; 362 input-enable; 363 }; 364 group1 { 365 pinmux = <&iomuxc_gpio_sd_b1_00_usdhc1_cmd>, 366 <&iomuxc_gpio_sd_b1_01_usdhc1_clk>, 367 <&iomuxc_gpio_sd_b1_02_usdhc1_data0>, 368 <&iomuxc_gpio_sd_b1_03_usdhc1_data1>, 369 <&iomuxc_gpio_sd_b1_04_usdhc1_data2>; 370 bias-pull-up; 371 input-enable; 372 }; 373 group2 { 374 pinmux = <&iomuxc_gpio_ad_34_usdhc1_vselect>, 375 <&iomuxc_gpio_ad_32_gpio_mux3_io31_cm7>; 376 drive-strength = "high"; 377 bias-pull-down; 378 slew-rate = "fast"; 379 }; 380 group3 { 381 pinmux = <&iomuxc_gpio_ad_35_gpio10_io02>; 382 drive-strength = "high"; 383 bias-pull-up; 384 slew-rate = "fast"; 385 }; 386 }; 387 388}; 389 390