1/*
2 * Copyright (c) 2021, NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <nxp/nxp_rt11xx_cm4.dtsi>
10#include "mimxrt1160_evk.dtsi"
11
12/ {
13	model = "NXP MIMXRT1160-EVK board";
14	compatible = "nxp,mimxrt1166";
15
16	chosen {
17		/*
18		 * Note: when using DMA, the SRAM region must be set to
19		 * a memory region that is not cached by the chip. If the chosen
20		 * sram region is changed and DMA is in use, you will
21		 * encounter issues!
22		 */
23		zephyr,sram = &sram1;
24		zephyr,console = &lpuart1;
25		zephyr,shell-uart = &lpuart1;
26		zephyr,flash-controller = &is25wp128;
27		zephyr,flash = &is25wp128;
28		nxp,m4-partition = &slot1_partition;
29		zephyr,ipc = &mailbox_b;
30	};
31
32
33	sdram0: memory@80000000 {
34		/* Winbond W9825G6KH-5I */
35		device_type = "memory";
36		reg = <0x80000000 DT_SIZE_M(64)>;
37	};
38
39};
40
41&lpuart1 {
42	status = "okay";
43	current-speed = <115200>;
44};
45
46&lpi2c1 {
47	status = "okay";
48};
49
50/* GPT and Systick are enabled. If power management is enabled, the GPT
51 * timer will be used instead of systick, as allows the core clock to
52 * be gated.
53 */
54&gpt_hw_timer {
55	status = "okay";
56};
57
58&systick {
59	status = "okay";
60};
61
62&edma_lpsr0 {
63	status = "okay";
64};
65
66&mailbox_b {
67	status = "okay";
68};
69