1/* 2 * Copyright 2019,2024 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8 9#include <nxp/nxp_lpc55S6x_ns.dtsi> 10#include "lpcxpresso55s69.dtsi" 11#include <zephyr/dt-bindings/input/input-event-codes.h> 12 13/ { 14 model = "NXP LPCXpresso55S69 board"; 15 compatible = "nxp,lpc55xxx", "nxp,lpc"; 16 17 cpus { 18 /delete-node/ cpu@1; 19 }; 20 21 aliases { 22 sw0 = &user_button_1; 23 sw1 = &user_button_2; 24 sw2 = &user_button_3; 25 watchdog0 = &wwdt0; 26 accel0 = &mma8652fc; 27 }; 28 29 chosen { 30 zephyr,sram = &non_secure_ram; 31 zephyr,flash = &flash0; 32 zephyr,code-partition = &slot0_ns_partition; 33 zephyr,uart-mcumgr = &flexcomm0; 34 zephyr,console = &flexcomm0; 35 zephyr,shell-uart = &flexcomm0; 36 zephyr,entropy = &rng; 37 }; 38 39 gpio_keys { 40 compatible = "gpio-keys"; 41 user_button_1: button_0 { 42 label = "User SW1"; 43 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 44 zephyr,code = <INPUT_KEY_0>; 45 }; 46 user_button_2: button_1 { 47 label = "User SW2"; 48 gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; 49 zephyr,code = <INPUT_KEY_1>; 50 }; 51 user_button_3: button_2 { 52 label = "User SW3"; 53 gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 54 zephyr,code = <INPUT_KEY_2>; 55 }; 56 }; 57}; 58 59&gpio0 { 60 status = "okay"; 61}; 62 63&gpio1 { 64 status = "okay"; 65}; 66 67&green_led { 68 status = "okay"; 69}; 70 71&red_led { 72 status = "okay"; 73}; 74 75&blue_led { 76 status = "okay"; 77}; 78 79&flexcomm0 { 80 status = "okay"; 81}; 82 83&flexcomm4 { 84 status = "okay"; 85}; 86 87&hs_lspi { 88 status = "okay"; 89}; 90 91&wwdt0 { 92 status = "okay"; 93}; 94 95&adc0 { 96 status = "okay"; 97 pinctrl-0 = <&pinmux_lpadc0>; 98 pinctrl-names = "default"; 99}; 100 101&dma0 { 102 /* 103 * The total number of dma channels available is defined by 104 * FSL_FEATURE_DMA_NUMBER_OF_CHANNELS in the SoC features file. 105 * Since memory from the heap pool is allocated based on the number 106 * of DMA channels, set this property to as many channels is needed 107 * for the platform. Adjust HEAP_MEM_POOL_SIZE in case you need more 108 * memory. 109 */ 110 dma-channels = <20>; 111 status = "okay"; 112}; 113 114zephyr_udc0: &usbhs { 115 status = "okay"; 116}; 117 118&ctimer0 { 119 status = "okay"; 120}; 121 122&ctimer1 { 123 status = "okay"; 124}; 125 126&ctimer2 { 127 status = "okay"; 128}; 129 130&ctimer3 { 131 status = "okay"; 132}; 133 134&ctimer4 { 135 status = "okay"; 136}; 137