1/*
2 * Copyright 2021-2025 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <zephyr/dt-bindings/gpio/gpio.h>
10#include <zephyr/dt-bindings/i2c/i2c.h>
11#include <nxp/nxp_mimx8mp_a53.dtsi>
12#include "imx8mp_evk-pinctrl.dtsi"
13
14/ {
15	model = "NXP i.MX8MP A53";
16	compatible = "fsl,mimx8mp";
17
18	chosen {
19		zephyr,console = &uart4;
20		zephyr,shell-uart = &uart4;
21		/* sram node actually locates at DDR DRAM */
22		zephyr,sram = &dram;
23	};
24
25	cpus {
26		cpu@0 {
27			status = "disabled";
28		};
29		cpu@1 {
30			status = "disabled";
31		};
32		cpu@2 {
33			status = "disabled";
34		};
35	};
36
37	dram: memory@c0000000 {
38		reg = <0xc0000000 DT_SIZE_M(1)>;
39	};
40
41};
42
43&enet {
44	status = "okay";
45};
46
47&enet_mac {
48	pinctrl-0 = <&pinmux_enet>;
49	pinctrl-names = "default";
50	phy-handle = <&phy>;
51	zephyr,random-mac-address;
52	phy-connection-type = "rgmii";
53	status = "okay";
54};
55
56&enet_mdio {
57	pinctrl-0 = <&pinmux_mdio>;
58	pinctrl-names = "default";
59	status = "okay";
60	phy: phy@1 {
61		compatible = "realtek,rtl8211f";
62		reg = <1>;
63		status = "okay";
64	};
65};
66
67&uart4 {
68	status = "okay";
69	current-speed = <115200>;
70	clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
71	pinctrl-0 = <&uart4_default>;
72	pinctrl-names = "default";
73};
74
75&i2c3 {
76	status = "okay";
77	pinctrl-0 = <&pinmux_i2c3>;
78	pinctrl-names = "default";
79	clock-frequency = <I2C_BITRATE_STANDARD>;
80
81	gpio_exp1: pca6416@20 {
82		compatible = "nxp,pca6416";
83		reg = <0x20>;
84		gpio-controller;
85		#gpio-cells = <2>;
86		interrupt-gpios = <&gpio1 12 (GPIO_ACTIVE_LOW|GPIO_PULL_UP)>;
87		status = "okay";
88	};
89};
90
91&gpio1 {
92	status = "okay";
93};
94