1/* 2 * Copyright 2024 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include "frdm_mcxn947-pinctrl.dtsi" 8#include <zephyr/dt-bindings/i2c/i2c.h> 9#include <zephyr/dt-bindings/input/input-event-codes.h> 10 11/ { 12 aliases{ 13 led0 = &red_led; 14 led1 = &green_led; 15 led2 = &blue_led; 16 sw0 = &user_button_2; 17 sw1 = &user_button_3; 18 sdhc0 = &usdhc0; 19 mcuboot-button0 = &user_button_2; 20 }; 21 22 leds { 23 compatible = "gpio-leds"; 24 green_led: led_1 { 25 gpios = <&gpio0 27 GPIO_ACTIVE_LOW>; 26 label = "Green LED"; 27 status = "disabled"; 28 }; 29 blue_led: led_2 { 30 gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 31 label = "Blue LED"; 32 status = "disabled"; 33 }; 34 red_led: led_3 { 35 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; 36 label = "Red LED"; 37 status = "disabled"; 38 }; 39 }; 40 41 gpio_keys { 42 compatible = "gpio-keys"; 43 user_button_2: button_0 { 44 label = "User SW2"; 45 gpios = <&gpio0 23 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 46 zephyr,code = <INPUT_KEY_0>; 47 status = "disabled"; 48 }; 49 user_button_3: button_1 { 50 label = "User SW3"; 51 gpios = <&gpio0 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 52 zephyr,code = <INPUT_KEY_1>; 53 status = "disabled"; 54 }; 55 }; 56 57 /* 58 * This node describes the GPIO pins of the LCD-PAR-S035 panel 8080 interface. 59 */ 60 nxp_lcd_8080_connector: lcd-8080-connector { 61 compatible = "nxp,lcd-8080"; 62 #gpio-cells = <2>; 63 gpio-map-mask = <0xffffffff 0xffffffc0>; 64 gpio-map-pass-thru = <0 0x3f>; 65 gpio-map = <9 0 &gpio4 6 0>, /* Pin 9, LCD touch INT */ 66 <10 0 &gpio4 5 0>, /* Pin 10, LCD backlight control */ 67 <11 0 &gpio4 7 0>; /* Pin 11, LCD and touch reset */ 68 }; 69}; 70 71&flexcomm1_lpspi1 { 72 pinctrl-0 = <&pinmux_flexcomm1_lpspi>; 73 pinctrl-names = "default"; 74}; 75 76nxp_8080_touch_panel_i2c: &flexcomm2_lpi2c2 { 77 pinctrl-0 = <&pinmux_flexcomm2_lpi2c>; 78 pinctrl-names = "default"; 79 clock-frequency = <I2C_BITRATE_STANDARD>; 80}; 81 82&flexcomm2_lpuart2 { 83 current-speed = <115200>; 84 pinctrl-0 = <&pinmux_flexcomm2_lpuart>; 85 pinctrl-names = "default"; 86}; 87 88&flexcomm4_lpuart4 { 89 current-speed = <115200>; 90 pinctrl-0 = <&pinmux_flexcomm4_lpuart>; 91 pinctrl-names = "default"; 92}; 93 94&flexcomm7_lpi2c7 { 95 pinctrl-0 = <&pinmux_flexcomm7_lpi2c>; 96 pinctrl-names = "default"; 97 clock-frequency = <I2C_BITRATE_STANDARD>; 98 ov7670: ov7670@21 { 99 compatible = "ovti,ov7670"; 100 reset-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; 101 pwdn-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; 102 reg = <0x21>; 103 }; 104}; 105 106/* SmartDMA is used for video driver on this board */ 107&smartdma { 108 status = "okay"; 109 program-mem = <0x4000000>; 110 video_sdma: video-sdma { 111 status = "okay"; 112 compatible = "nxp,video-smartdma"; 113 pinctrl-0 = <&pinmux_smartdma_camera>; 114 pinctrl-names = "default"; 115 sensor = <&ov7670>; 116 vsync-pin = <4>; 117 hsync-pin = <11>; 118 pclk-pin = <5>; 119 }; 120}; 121 122/* 123 * MCXN947 board uses OS timer as the kernel timer 124 * In case we need to switch to SYSTICK timer, then 125 * replace &os_timer with &systick 126 */ 127&os_timer { 128 status = "disabled"; 129}; 130 131&systick { 132 status = "okay"; 133}; 134 135&flash { 136 partitions { 137 compatible = "fixed-partitions"; 138 #address-cells = <1>; 139 #size-cells = <1>; 140 141 boot_partition: partition@0 { 142 label = "mcuboot"; 143 reg = <0x00000000 DT_SIZE_K(80)>; 144 }; 145 /* For the MCUBoot "upgrade only" method, 146 * the slot sizes must be equal. 147 */ 148 slot0_partition: partition@14000 { 149 label = "image-0"; 150 reg = <0x00014000 DT_SIZE_K(984)>; 151 }; 152 slot1_partition: partition@10A000 { 153 label = "image-1"; 154 reg = <0x0010A000 DT_SIZE_K(984)>; 155 }; 156 /* storage_partition is placed in WINBOND flash memory*/ 157 }; 158}; 159 160&flexspi { 161 pinctrl-0 = <&pinmux_flexspi>; 162 pinctrl-names = "default"; 163 ahb-prefetch; 164 ahb-bufferable; 165 ahb-cacheable; 166 ahb-read-addr-opt; 167 combination-mode; 168 rx-clock-source = <1>; 169 170 /* WINBOND flash memory*/ 171 w25q64jvssiq: w25q64jvssiq@0 { 172 compatible = "nxp,imx-flexspi-nor"; 173 status = "disabled"; 174 size = <67108864>; 175 reg = <0>; 176 spi-max-frequency = <133000000>; 177 jedec-id = [ef 40 17]; 178 erase-block-size = <4096>; 179 write-block-size = <1>; 180 cs-interval-unit = <1>; 181 cs-interval = <2>; 182 cs-hold-time = <3>; 183 cs-setup-time = <3>; 184 data-valid-time = <2>; 185 column-space = <0>; 186 partitions { 187 compatible = "fixed-partitions"; 188 #address-cells = <1>; 189 #size-cells = <1>; 190 storage_partition: partition@0 { 191 label = "storage"; 192 reg = <0x0 DT_SIZE_M(8)>; 193 }; 194 }; 195 }; 196}; 197 198&dac0 { 199 pinctrl-0 = <&pinmux_dac0>; 200 pinctrl-names = "default"; 201}; 202 203&enet { 204 pinctrl-0 = <&pinmux_enet_qos>; 205 pinctrl-names = "default"; 206}; 207 208&enet_mac { 209 phy-connection-type = "rmii"; 210 zephyr,random-mac-address; 211 phy-handle = <&phy>; 212}; 213 214&enet_mdio { 215 phy: ethernet-phy@0 { 216 compatible = "ethernet-phy"; 217 reg = <0>; 218 status = "okay"; 219 }; 220}; 221 222&flexpwm1_pwm0 { 223 pinctrl-0 = <&pinmux_flexpwm1_pwm0>; 224 pinctrl-names = "default"; 225}; 226 227&usdhc0 { 228 pinctrl-0 = <&pinmux_usdhc0>; 229 pinctrl-1 = <&pinmux_usdhc0>; 230 pinctrl-2 = <&pinmux_usdhc0>; 231 cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 232 pinctrl-names = "default", "slow", "med"; 233 no-1-8-v; 234}; 235 236&lpadc0 { 237 pinctrl-0 = <&pinmux_lpadc0>; 238 pinctrl-names = "default"; 239}; 240 241zephyr_mipi_dbi_parallel: &flexio0_lcd { 242 /* DMA channels 0, muxed to FlexIO TX */ 243 dmas = <&edma0 0 61>; 244 dma-names = "tx"; 245 shifters-count = <8>; 246 timers-count = <1>; 247 enwr-pin = <1>; 248 rd-pin = <0>; 249 data-pin-start = <16>; 250 reset-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; 251 cs-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; 252 rs-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; 253 pinctrl-0 = <&pinmux_flexio_lcd>; 254 pinctrl-names = "default"; 255}; 256 257&lpcmp0 { 258 pinctrl-0 = <&pinmux_lpcmp0>; 259 pinctrl-names = "default"; 260}; 261 262&i3c1 { 263 pinctrl-0 = <&pinmux_i3c1>; 264 pinctrl-names = "default"; 265}; 266 267&flexcan0 { 268 pinctrl-0 = <&pinmux_flexcan0>; 269 pinctrl-names = "default"; 270}; 271 272&sc_timer { 273 pinctrl-0 = <&pinmux_sctimer>; 274 pinctrl-names = "default"; 275}; 276
