1/*
2 * NOTE: Autogenerated file by gen_board_pinctrl.py
3 * for MK64FN1M0VLL12/signal_configuration.xml
4 *
5 * Copyright (c) 2022, NXP
6 * SPDX-License-Identifier: Apache-2.0
7 */
8
9
10#include <nxp/kinetis/MK64FN1M0VLL12-pinctrl.h>
11
12&pinctrl {
13	adc0_default: adc0_default {
14		group0 {
15			pinmux = <ADC0_SE14_PTC0>;
16			drive-strength = "low";
17			slew-rate = "fast";
18		};
19	};
20
21	adc1_default: adc1_default {
22		group0 {
23			pinmux = <ADC1_SE14_PTB10>;
24			drive-strength = "low";
25			slew-rate = "fast";
26		};
27	};
28
29	pinmux_enet: pinmux_enet {
30		group1 {
31			pinmux = <RMII0_RXER_PTA5>,
32				<RMII0_RXD1_PTA12>,
33				<RMII0_RXD0_PTA13>,
34				<RMII0_CRS_DV_PTA14>,
35				<RMII0_TXEN_PTA15>,
36				<RMII0_TXD0_PTA16>,
37				<RMII0_TXD1_PTA17>;
38			drive-strength = "low";
39			slew-rate = "fast";
40		};
41	};
42
43	pinmux_enet_mdio: pinmux_enet_mdio {
44		group0 {
45			pinmux = <RMII0_MDIO_PTB0>;
46			drive-strength = "low";
47			drive-open-drain;
48			bias-pull-up;
49			slew-rate = "fast";
50		};
51		group1 {
52			pinmux = <RMII0_MDC_PTB1>;
53			drive-strength = "low";
54			slew-rate = "fast";
55		};
56	};
57
58	pinmux_ptp: pinmux_ptp {
59		group0 {
60			pinmux = <ENET0_1588_TMR0_PTC16>,
61				<ENET0_1588_TMR1_PTC17>,
62				<ENET0_1588_TMR2_PTC18>;
63			drive-strength = "low";
64			slew-rate = "fast";
65		};
66	};
67
68	flexcan0_default: flexcan0_default {
69		group0 {
70			pinmux = <CAN0_RX_PTB19>;
71			drive-strength = "low";
72			bias-pull-up;
73			slew-rate = "fast";
74		};
75		group1 {
76			pinmux = <CAN0_TX_PTB18>;
77			drive-strength = "low";
78			slew-rate = "fast";
79		};
80	};
81
82	ftm0_default: ftm0_default {
83		group0 {
84			pinmux = <FTM0_CH0_PTC1>;
85			drive-strength = "low";
86			slew-rate = "fast";
87		};
88	};
89
90	ftm3_default: ftm3_default {
91		group0 {
92			pinmux = <FTM3_CH4_PTC8>,
93				<FTM3_CH5_PTC9>;
94			drive-strength = "low";
95			slew-rate = "fast";
96		};
97	};
98
99	i2c0_default: i2c0_default {
100		group0 {
101			pinmux = <I2C0_SCL_PTE24>,
102				<I2C0_SDA_PTE25>;
103			drive-strength = "low";
104			drive-open-drain;
105			slew-rate = "fast";
106		};
107	};
108
109	/* PTC16 and PTC17 conflict with uart3 pins */
110	ptp_default: ptp_default {
111		group0 {
112			pinmux = <ENET0_1588_TMR0_PTC16>,
113				<ENET0_1588_TMR1_PTC17>,
114				<ENET0_1588_TMR2_PTC18>;
115			drive-strength = "low";
116			slew-rate = "fast";
117		};
118	};
119
120	/* pins conflict with uart2 */
121	spi0_default: spi0_default {
122		group0 {
123			pinmux = <SPI0_PCS0_PTD0>,
124				<SPI0_SCK_PTD1>,
125				<SPI0_SOUT_PTD2>,
126				<SPI0_SIN_PTD3>;
127			drive-strength = "low";
128			slew-rate = "fast";
129		};
130	};
131
132	spi1_default: spi1_default {
133		group0 {
134			pinmux = <SPI1_PCS0_PTE4>,
135				<SPI1_SCK_PTE2>,
136				<SPI1_SOUT_PTE3>,
137				<SPI1_SIN_PTE1>;
138			drive-strength = "low";
139			slew-rate = "fast";
140	    };
141	};
142
143
144	uart0_default: uart0_default {
145		group0 {
146			pinmux = <UART0_RX_PTB16>,
147				<UART0_TX_PTB17>;
148			drive-strength = "low";
149			slew-rate = "fast";
150		};
151	};
152
153	/* pins conflict with spi0 */
154	uart2_default: uart2_default {
155		group0 {
156			pinmux = <UART2_CTS_b_PTD1>,
157				<UART2_RTS_b_PTD0>,
158				<UART2_RX_PTD2>,
159				<UART2_TX_PTD3>;
160			drive-strength = "low";
161			slew-rate = "fast";
162		};
163	};
164
165	/* PTC16 and PTC17 conflict with PTP timer pins */
166	uart3_default: uart3_default {
167		group0 {
168			pinmux = <UART3_RX_PTC16>,
169				<UART3_TX_PTC17>;
170			drive-strength = "low";
171			slew-rate = "fast";
172		};
173	};
174
175};
176