1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	pwm0_default: pwm0_default {
8		group1 {
9			psels = <NRF_PSEL(PWM_OUT0, 1, 8)>,
10				<NRF_PSEL(PWM_OUT1, 1, 6)>,
11				<NRF_PSEL(PWM_OUT2, 1, 7)>;
12		};
13	};
14
15	pwm0_sleep: pwm0_sleep {
16		group1 {
17			psels = <NRF_PSEL(PWM_OUT0, 1, 8)>,
18				<NRF_PSEL(PWM_OUT1, 1, 6)>,
19				<NRF_PSEL(PWM_OUT2, 1, 7)>;
20			low-power-enable;
21		};
22	};
23
24	pwm1_default: pwm1_default {
25		group1 {
26			psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
27		};
28	};
29
30	pwm1_sleep: pwm1_sleep {
31		group1 {
32			psels = <NRF_PSEL(PWM_OUT0, 1, 15)>;
33			low-power-enable;
34		};
35	};
36
37	i2c1_default: i2c1_default {
38		group1 {
39			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
40				<NRF_PSEL(TWIM_SCL, 1, 3)>;
41		};
42	};
43
44	i2c1_sleep: i2c1_sleep {
45		group1 {
46			psels = <NRF_PSEL(TWIM_SDA, 1, 2)>,
47				<NRF_PSEL(TWIM_SCL, 1, 3)>;
48			low-power-enable;
49		};
50	};
51
52	spi3_default: spi3_default {
53		group1 {
54			psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
55				<NRF_PSEL(SPIM_MOSI, 0, 28)>,
56				<NRF_PSEL(SPIM_MISO, 0, 26)>;
57		};
58	};
59
60	spi3_sleep: spi3_sleep {
61		group1 {
62			psels = <NRF_PSEL(SPIM_SCK, 0, 29)>,
63				<NRF_PSEL(SPIM_MOSI, 0, 28)>,
64				<NRF_PSEL(SPIM_MISO, 0, 26)>;
65			low-power-enable;
66		};
67	};
68
69	uart0_default: uart0_default {
70		group1 {
71			psels = <NRF_PSEL(UART_TX, 0, 12)>,
72				<NRF_PSEL(UART_RX, 0, 11)>,
73				<NRF_PSEL(UART_RTS, 0, 10)>,
74				<NRF_PSEL(UART_CTS, 0, 9)>;
75		};
76	};
77
78	uart0_sleep: uart0_sleep {
79		group1 {
80			psels = <NRF_PSEL(UART_TX, 0, 12)>,
81				<NRF_PSEL(UART_RX, 0, 11)>,
82				<NRF_PSEL(UART_RTS, 0, 10)>,
83				<NRF_PSEL(UART_CTS, 0, 9)>;
84			low-power-enable;
85		};
86	};
87
88	qspi_default: qspi_default {
89		group1 {
90			psels = <NRF_PSEL(QSPI_SCK, 0, 17)>,
91				<NRF_PSEL(QSPI_IO0, 0, 13)>,
92				<NRF_PSEL(QSPI_IO1, 0, 14)>,
93				<NRF_PSEL(QSPI_CSN, 0, 18)>;
94		};
95	};
96
97	qspi_sleep: qspi_sleep {
98		group1 {
99			psels = <NRF_PSEL(QSPI_SCK, 0, 17)>,
100				<NRF_PSEL(QSPI_IO0, 0, 13)>,
101				<NRF_PSEL(QSPI_IO1, 0, 14)>;
102			low-power-enable;
103		};
104		group2 {
105			psels = <NRF_PSEL(QSPI_CSN, 0, 18)>;
106			low-power-enable;
107			bias-pull-up;
108		};
109	};
110
111	spi4_default: spi4_default {
112		group1 {
113			psels = <NRF_PSEL(SPIM_SCK, 0, 5)>,
114				<NRF_PSEL(SPIM_MOSI, 0, 9)>,
115				<NRF_PSEL(SPIM_MISO, 0, 10)>;
116			nordic,drive-mode = <NRF_DRIVE_H0H1>;
117		};
118	};
119
120	spi4_sleep: spi4_sleep {
121		group1 {
122			psels = <NRF_PSEL(SPIM_SCK, 0, 5)>,
123				<NRF_PSEL(SPIM_MOSI, 0, 9)>,
124				<NRF_PSEL(SPIM_MISO, 0, 10)>;
125			low-power-enable;
126		};
127	};
128
129};
130