1/*
2 * Copyright (c) 2023 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 27)>,
10				<NRF_PSEL(UART_RTS, 0, 14)>;
11		};
12		group2 {
13			psels = <NRF_PSEL(UART_RX, 0, 26)>,
14				<NRF_PSEL(UART_CTS, 0, 15)>;
15			bias-pull-up;
16		};
17	};
18
19	uart0_sleep: uart0_sleep {
20		group1 {
21			psels = <NRF_PSEL(UART_TX, 0, 27)>,
22				<NRF_PSEL(UART_RX, 0, 26)>,
23				<NRF_PSEL(UART_RTS, 0, 14)>,
24				<NRF_PSEL(UART_CTS, 0, 15)>;
25			low-power-enable;
26		};
27	};
28
29	uart1_default: uart1_default {
30		group1 {
31			psels = <NRF_PSEL(UART_TX, 0, 29)>,
32				<NRF_PSEL(UART_RTS, 0, 16)>;
33		};
34		group2 {
35			psels = <NRF_PSEL(UART_RX, 0, 28)>,
36				<NRF_PSEL(UART_CTS, 0, 17)>;
37			bias-pull-up;
38		};
39	};
40
41	uart1_sleep: uart1_sleep {
42		group1 {
43			psels = <NRF_PSEL(UART_TX, 0, 29)>,
44				<NRF_PSEL(UART_RX, 0, 28)>,
45				<NRF_PSEL(UART_RTS, 0, 16)>,
46				<NRF_PSEL(UART_CTS, 0, 17)>;
47			low-power-enable;
48		};
49	};
50
51	i2c2_default: i2c2_default {
52		group1 {
53			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
54				<NRF_PSEL(TWIM_SCL, 0, 31)>;
55		};
56	};
57
58	i2c2_sleep: i2c2_sleep {
59		group1 {
60			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
61				<NRF_PSEL(TWIM_SCL, 0, 31)>;
62			low-power-enable;
63		};
64	};
65
66	pwm0_default: pwm0_default {
67		group1 {
68			psels = <NRF_PSEL(PWM_OUT0, 0, 0)>;
69		};
70	};
71
72	pwm0_sleep: pwm0_sleep {
73		group1 {
74			psels = <NRF_PSEL(PWM_OUT0, 0, 0)>;
75			low-power-enable;
76		};
77	};
78
79	spi3_default: spi3_default {
80		group1 {
81			psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
82				<NRF_PSEL(SPIM_MISO, 0, 12)>,
83				<NRF_PSEL(SPIM_MOSI, 0, 11)>;
84			nordic,drive-mode = <NRF_DRIVE_H0H1>;
85		};
86	};
87
88	spi3_sleep: spi3_sleep {
89		group1 {
90			psels = <NRF_PSEL(SPIM_SCK, 0, 13)>,
91				<NRF_PSEL(SPIM_MISO, 0, 12)>,
92				<NRF_PSEL(SPIM_MOSI, 0, 11)>;
93			low-power-enable;
94		};
95	};
96};
97