1/* 2 * Copyright (c) 2023 Nordic Semiconductor 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6&pinctrl { 7 uart0_default: uart0_default { 8 group1 { 9 psels = <NRF_PSEL(UART_TX, 0, 11)>, 10 <NRF_PSEL(UART_RTS, 0, 10)>; 11 }; 12 group2 { 13 psels = <NRF_PSEL(UART_RX, 0, 12)>, 14 <NRF_PSEL(UART_CTS, 0, 9)>; 15 bias-pull-up; 16 }; 17 }; 18 19 uart0_sleep: uart0_sleep { 20 group1 { 21 psels = <NRF_PSEL(UART_TX, 0, 11)>, 22 <NRF_PSEL(UART_RX, 0, 12)>, 23 <NRF_PSEL(UART_RTS, 0, 10)>, 24 <NRF_PSEL(UART_CTS, 0, 9)>; 25 low-power-enable; 26 }; 27 }; 28 29 uart1_default: uart1_default { 30 group1 { 31 psels = <NRF_PSEL(UART_TX, 0, 24)>, 32 <NRF_PSEL(UART_RTS, 0, 25)>; 33 }; 34 group2 { 35 psels = <NRF_PSEL(UART_RX, 0, 23)>, 36 <NRF_PSEL(UART_CTS, 0, 17)>; 37 bias-pull-up; 38 }; 39 }; 40 41 uart1_sleep: uart1_sleep { 42 group1 { 43 psels = <NRF_PSEL(UART_TX, 0, 24)>, 44 <NRF_PSEL(UART_RX, 0, 23)>, 45 <NRF_PSEL(UART_RTS, 0, 25)>, 46 <NRF_PSEL(UART_CTS, 0, 17)>; 47 low-power-enable; 48 }; 49 }; 50 51 i2c2_default: i2c2_default { 52 group1 { 53 psels = <NRF_PSEL(TWIM_SDA, 0, 8)>, 54 <NRF_PSEL(TWIM_SCL, 0, 7)>; 55 }; 56 }; 57 58 i2c2_sleep: i2c2_sleep { 59 group1 { 60 psels = <NRF_PSEL(TWIM_SDA, 0, 8)>, 61 <NRF_PSEL(TWIM_SCL, 0, 7)>; 62 low-power-enable; 63 }; 64 }; 65 66 pwm0_default: pwm0_default { 67 group1 { 68 psels = <NRF_PSEL(PWM_OUT0, 0, 29)>, 69 <NRF_PSEL(PWM_OUT1, 0, 30)>, 70 <NRF_PSEL(PWM_OUT2, 0, 31)>; 71 }; 72 }; 73 74 pwm0_sleep: pwm0_sleep { 75 group1 { 76 psels = <NRF_PSEL(PWM_OUT0, 0, 29)>, 77 <NRF_PSEL(PWM_OUT1, 0, 30)>, 78 <NRF_PSEL(PWM_OUT2, 0, 31)>; 79 low-power-enable; 80 }; 81 }; 82 83 spi3_default: spi3_default { 84 group1 { 85 psels = <NRF_PSEL(SPIM_SCK, 0, 20)>, 86 <NRF_PSEL(SPIM_MISO, 0, 22)>, 87 <NRF_PSEL(SPIM_MOSI, 0, 21)>; 88 nordic,drive-mode = <NRF_DRIVE_H0H1>; 89 }; 90 }; 91 92 spi3_sleep: spi3_sleep { 93 group1 { 94 psels = <NRF_PSEL(SPIM_SCK, 0, 20)>, 95 <NRF_PSEL(SPIM_MISO, 0, 22)>, 96 <NRF_PSEL(SPIM_MOSI, 0, 21)>; 97 low-power-enable; 98 }; 99 }; 100}; 101