1.. _nrf5340dk_nrf5340:
2
3nRF5340 DK
4##########
5
6Overview
7********
8
9The nRF5340 DK (PCA10095) is a single-board development kit for evaluation
10and development on the Nordic nRF5340 System-on-Chip (SoC).
11
12The nRF5340 is a dual-core SoC based on the Arm® Cortex®-M33 architecture, with:
13
14* a full-featured Arm Cortex-M33F core with DSP instructions, FPU, and
15  Armv8-M Security Extension, running at up to 128 MHz, referred to as
16  the **application core**
17* a secondary Arm Cortex-M33 core, with a reduced feature set, running at
18  a fixed 64 MHz, referred to as the **network core**.
19
20The ``nrf5340dk/nrf5340/cpuapp`` build target provides support for the application
21core on the nRF5340 SoC. The ``nrf5340dk/nrf5340/cpunet`` build target provides
22support for the network core on the nRF5340 SoC.
23
24nRF5340 SoC provides support for the following devices:
25
26* :abbr:`ADC (Analog to Digital Converter)`
27* CLOCK
28* FLASH
29* :abbr:`GPIO (General Purpose Input Output)`
30* :abbr:`IDAU (Implementation Defined Attribution Unit)`
31* :abbr:`I2C (Inter-Integrated Circuit)`
32* :abbr:`MPU (Memory Protection Unit)`
33* :abbr:`NVIC (Nested Vectored Interrupt Controller)`
34* :abbr:`PWM (Pulse Width Modulation)`
35* RADIO (Bluetooth Low Energy and 802.15.4)
36* :abbr:`RTC (nRF RTC System Clock)`
37* Segger RTT (RTT Console)
38* :abbr:`SPI (Serial Peripheral Interface)`
39* :abbr:`UARTE (Universal asynchronous receiver-transmitter)`
40* :abbr:`USB (Universal Serial Bus)`
41* :abbr:`WDT (Watchdog Timer)`
42
43.. figure:: img/nrf5340dk.jpg
44     :align: center
45     :alt: nRF5340 DK
46
47     nRF5340 DK (Credit: Nordic Semiconductor)
48
49More information about the board can be found at the
50`nRF5340 DK website`_.
51The `nRF5340 DK Product Specification`_
52contains the processor's information and the datasheet.
53
54
55Hardware
56********
57
58nRF5340 DK has two external oscillators. The frequency of
59the slow clock is 32.768 kHz. The frequency of the main clock
60is 32 MHz.
61
62Supported Features
63==================
64
65The ``nrf5340dk/nrf5340/cpuapp`` board configuration supports the following
66hardware features:
67
68+-----------+------------+----------------------+
69| Interface | Controller | Driver/Component     |
70+===========+============+======================+
71| ADC       | on-chip    | adc                  |
72+-----------+------------+----------------------+
73| CLOCK     | on-chip    | clock_control        |
74+-----------+------------+----------------------+
75| FLASH     | on-chip    | flash                |
76+-----------+------------+----------------------+
77| GPIO      | on-chip    | gpio                 |
78+-----------+------------+----------------------+
79| I2C(M)    | on-chip    | i2c                  |
80+-----------+------------+----------------------+
81| MPU       | on-chip    | arch/arm             |
82+-----------+------------+----------------------+
83| NVIC      | on-chip    | arch/arm             |
84+-----------+------------+----------------------+
85| PWM       | on-chip    | pwm                  |
86+-----------+------------+----------------------+
87| RTC       | on-chip    | system clock         |
88+-----------+------------+----------------------+
89| RTT       | Segger     | console              |
90+-----------+------------+----------------------+
91| SPI(M/S)  | on-chip    | spi                  |
92+-----------+------------+----------------------+
93| SPU       | on-chip    | system protection    |
94+-----------+------------+----------------------+
95| UARTE     | on-chip    | serial               |
96+-----------+------------+----------------------+
97| USB       | on-chip    | usb                  |
98+-----------+------------+----------------------+
99| WDT       | on-chip    | watchdog             |
100+-----------+------------+----------------------+
101
102The ``nrf5340dk/nrf5340/cpunet`` board configuration supports the following
103hardware features:
104
105+-----------+------------+----------------------+
106| Interface | Controller | Driver/Component     |
107+===========+============+======================+
108| CLOCK     | on-chip    | clock_control        |
109+-----------+------------+----------------------+
110| FLASH     | on-chip    | flash                |
111+-----------+------------+----------------------+
112| GPIO      | on-chip    | gpio                 |
113+-----------+------------+----------------------+
114| I2C(M)    | on-chip    | i2c                  |
115+-----------+------------+----------------------+
116| MPU       | on-chip    | arch/arm             |
117+-----------+------------+----------------------+
118| NVIC      | on-chip    | arch/arm             |
119+-----------+------------+----------------------+
120| RADIO     | on-chip    | Bluetooth,           |
121|           |            | ieee802154           |
122+-----------+------------+----------------------+
123| RTC       | on-chip    | system clock         |
124+-----------+------------+----------------------+
125| RTT       | Segger     | console              |
126+-----------+------------+----------------------+
127| SPI(M/S)  | on-chip    | spi                  |
128+-----------+------------+----------------------+
129| UARTE     | on-chip    | serial               |
130+-----------+------------+----------------------+
131| WDT       | on-chip    | watchdog             |
132+-----------+------------+----------------------+
133
134Other hardware features have not been enabled yet for this board.
135See `nRF5340 DK Product Specification`_
136for a complete list of nRF5340 DK board hardware features.
137
138Connections and IOs
139===================
140
141LED
142---
143
144* LED1 (green) = P0.28
145* LED2 (green) = P0.29
146* LED3 (green) = P0.30
147* LED4 (green) = P0.31
148
149Push buttons
150------------
151
152* BUTTON1 = SW1 = P0.23
153* BUTTON2 = SW2 = P0.24
154* BUTTON3 = SW3 = P0.8
155* BUTTON4 = SW4 = P0.9
156* BOOT = SW5 = boot/reset
157
158Security components
159===================
160
161- Implementation Defined Attribution Unit (`IDAU`_) on the application core.
162  The IDAU is implemented with the System Protection Unit and is used to
163  define secure and non-secure memory maps.  By default, all of the memory
164  space  (Flash, SRAM, and peripheral address space) is defined to be secure
165  accessible only.
166- Secure boot.
167
168Programming and Debugging
169*************************
170
171nRF5340 application core supports the Armv8-M Security Extension.
172Applications built for the ``nrf5340dk/nrf5340/cpuapp`` board by default
173boot in the Secure state.
174
175nRF5340 network core does not support the Armv8-M Security Extension.
176nRF5340 IDAU may configure bus accesses by the nRF5340 network core
177to have Secure attribute set; the latter allows to build and run
178Secure only applications on the nRF5340 SoC.
179
180Building Secure/Non-Secure Zephyr applications with Arm |reg| TrustZone |reg|
181=============================================================================
182
183Applications on the nRF5340 may contain a Secure and a Non-Secure firmware
184image for the application core. The Secure image can be built using either
185Zephyr or `Trusted Firmware M`_ (TF-M). Non-Secure firmware
186images are always built using Zephyr. The two alternatives are described below.
187
188.. note::
189
190   By default the Secure image for nRF5340 application core is built
191   using TF-M.
192
193
194Building the Secure firmware with TF-M
195--------------------------------------
196
197The process to build the Secure firmware image using TF-M and the Non-Secure
198firmware image using Zephyr requires the following steps:
199
2001. Build the Non-Secure Zephyr application
201   for the application core using ``-DBOARD=nrf5340dk/nrf5340/cpuapp/ns``.
202   To invoke the building of TF-M the Zephyr build system requires the
203   Kconfig option ``BUILD_WITH_TFM`` to be enabled, which is done by
204   default when building Zephyr as a Non-Secure application.
205   The Zephyr build system will perform the following steps automatically:
206
207      * Build the Non-Secure firmware image as a regular Zephyr application
208      * Build a TF-M (secure) firmware image
209      * Merge the output image binaries together
210      * Optionally build a bootloader image (MCUboot)
211
212.. note::
213
214   Depending on the TF-M configuration, an application DTS overlay may be
215   required, to adjust the Non-Secure image Flash and SRAM starting address
216   and sizes.
217
2182. Build the application firmware for the network core using
219   ``-DBOARD=nrf5340dk/nrf5340/cpunet``.
220
221
222Building the Secure firmware using Zephyr
223-----------------------------------------
224
225The process to build the Secure and the Non-Secure firmware images
226using Zephyr requires the following steps:
227
2281. Build the Secure Zephyr application for the application core
229   using ``-DBOARD=nrf5340dk/nrf5340/cpuapp`` and
230   ``CONFIG_TRUSTED_EXECUTION_SECURE=y`` and ``CONFIG_BUILD_WITH_TFM=n``
231   in the application project configuration file.
2322. Build the Non-Secure Zephyr application for the application core
233   using ``-DBOARD=nrf5340dk/nrf5340/cpuapp/ns``.
2343. Merge the two binaries together.
2354. Build the application firmware for the network core using
236   ``-DBOARD=nrf5340dk/nrf5340/cpunet``.
237
238
239When building a Secure/Non-Secure application for the nRF5340 application core,
240the Secure application will have to set the IDAU (SPU) configuration to allow
241Non-Secure access to all CPU resources utilized by the Non-Secure application
242firmware. SPU configuration shall take place before jumping to the Non-Secure
243application.
244
245Building a Secure only application
246==================================
247
248Build the Zephyr app in the usual way (see :ref:`build_an_application`
249and :ref:`application_run`), using ``-DBOARD=nrf5340dk/nrf5340/cpuapp`` for
250the firmware running on the nRF5340 application core, and using
251``-DBOARD=nrf5340dk/nrf5340/cpunet`` for the firmware running
252on the nRF5340 network core.
253
254Flashing
255========
256
257Follow the instructions in the :ref:`nordic_segger` page to install
258and configure all the necessary software. Further information can be
259found in :ref:`nordic_segger_flashing`. Then you can build and flash
260applications as usual (:ref:`build_an_application` and
261:ref:`application_run` for more details).
262
263.. warning::
264
265   The nRF5340 has a flash read-back protection feature. When flash read-back
266   protection is active, you will need to recover the chip before reflashing.
267   If you are flashing with :ref:`west <west-build-flash-debug>`, run
268   this command for more details on the related ``--recover`` option:
269
270   .. code-block:: console
271
272      west flash -H -r nrfjprog --skip-rebuild
273
274.. note::
275
276   Flashing and debugging applications on the nRF5340 DK requires
277   upgrading the nRF Command Line Tools to version 10.12.0. Further
278   information on how to install the nRF Command Line Tools can be
279   found in :ref:`nordic_segger_flashing`.
280
281Here is an example for the :zephyr:code-sample:`hello_world` application running on the
282nRF5340 application core.
283
284First, run your favorite terminal program to listen for output.
285
286.. code-block:: console
287
288   $ minicom -D <tty_device> -b 115200
289
290Replace :code:`<tty_device>` with the port where the board nRF5340 DK
291can be found. For example, under Linux, :code:`/dev/ttyACM0`.
292
293Then build and flash the application in the usual way.
294
295.. zephyr-app-commands::
296   :zephyr-app: samples/hello_world
297   :board: nrf5340dk/nrf5340/cpuapp
298   :goals: build flash
299
300Debugging
301=========
302
303Refer to the :ref:`nordic_segger` page to learn about debugging Nordic
304boards with a Segger IC.
305
306
307Testing the LEDs and buttons in the nRF5340 DK
308**********************************************
309
310There are 2 samples that allow you to test that the buttons (switches) and
311LEDs on the board are working properly with Zephyr:
312
313* :zephyr:code-sample:`blinky`
314* :zephyr:code-sample:`button`
315
316You can build and flash the examples to make sure Zephyr is running correctly on
317your board. The button and LED definitions can be found in
318:zephyr_file:`boards/nordic/nrf5340dk/nrf5340_cpuapp_common.dtsi`.
319
320References
321**********
322
323.. target-notes::
324
325.. _IDAU:
326   https://developer.arm.com/docs/100690/latest/attribution-units-sau-and-idau
327.. _nRF5340 DK website:
328   https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF5340-DK
329.. _nRF5340 DK Product Specification: https://docs.nordicsemi.com/bundle/ps_nrf5340/page/keyfeatures_html5.html
330.. _Trusted Firmware M: https://www.trustedfirmware.org/projects/tf-m/
331