1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 6)>,
10				<NRF_PSEL(UART_RTS, 0, 5)>;
11		};
12		group2 {
13			psels = <NRF_PSEL(UART_RX, 0, 8)>,
14				<NRF_PSEL(UART_CTS, 0, 7)>;
15			bias-pull-up;
16		};
17	};
18
19	uart0_sleep: uart0_sleep {
20		group1 {
21			psels = <NRF_PSEL(UART_TX, 0, 6)>,
22				<NRF_PSEL(UART_RX, 0, 8)>,
23				<NRF_PSEL(UART_RTS, 0, 5)>,
24				<NRF_PSEL(UART_CTS, 0, 7)>;
25			low-power-enable;
26		};
27	};
28
29	i2c0_default: i2c0_default {
30		group1 {
31			psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
32				<NRF_PSEL(TWIM_SCL, 0, 29)>;
33		};
34	};
35
36	i2c0_sleep: i2c0_sleep {
37		group1 {
38			psels = <NRF_PSEL(TWIM_SDA, 0, 28)>,
39				<NRF_PSEL(TWIM_SCL, 0, 29)>;
40			low-power-enable;
41		};
42	};
43
44	spi1_default: spi1_default {
45		group1 {
46			psels = <NRF_PSEL(SPIM_SCK, 0, 17)>,
47				<NRF_PSEL(SPIM_MISO, 0, 20)>,
48				<NRF_PSEL(SPIM_MOSI, 0, 30)>;
49		};
50	};
51
52	spi1_sleep: spi1_sleep {
53		group1 {
54			psels = <NRF_PSEL(SPIM_SCK, 0, 17)>,
55				<NRF_PSEL(SPIM_MISO, 0, 20)>,
56				<NRF_PSEL(SPIM_MOSI, 0, 30)>;
57			low-power-enable;
58		};
59	};
60
61};
62