1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 9)>,
10				<NRF_PSEL(UART_RX, 0, 11)>,
11				<NRF_PSEL(UART_RTS, 0, 8)>,
12				<NRF_PSEL(UART_CTS, 0, 10)>;
13		};
14	};
15
16	uart0_sleep: uart0_sleep {
17		group1 {
18			psels = <NRF_PSEL(UART_TX, 0, 9)>,
19				<NRF_PSEL(UART_RX, 0, 11)>,
20				<NRF_PSEL(UART_RTS, 0, 8)>,
21				<NRF_PSEL(UART_CTS, 0, 10)>;
22			low-power-enable;
23		};
24	};
25
26	i2c0_default: i2c0_default {
27		group1 {
28			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
29				<NRF_PSEL(TWIM_SCL, 0, 7)>;
30		};
31	};
32
33	i2c0_sleep: i2c0_sleep {
34		group1 {
35			psels = <NRF_PSEL(TWIM_SDA, 0, 30)>,
36				<NRF_PSEL(TWIM_SCL, 0, 7)>;
37			low-power-enable;
38		};
39	};
40
41	i2c1_default: i2c1_default {
42		group1 {
43			psels = <NRF_PSEL(TWIM_SDA, 0, 5)>,
44				<NRF_PSEL(TWIM_SCL, 0, 6)>;
45		};
46	};
47
48	i2c1_sleep: i2c1_sleep {
49		group1 {
50			psels = <NRF_PSEL(TWIM_SDA, 0, 5)>,
51				<NRF_PSEL(TWIM_SCL, 0, 6)>;
52			low-power-enable;
53		};
54	};
55
56	spi0_default: spi0_default {
57		group1 {
58			psels = <NRF_PSEL(SPIM_SCK, 0, 7)>,
59				<NRF_PSEL(SPIM_MOSI, 0, 29)>,
60				<NRF_PSEL(SPIM_MISO, 0, 30)>;
61		};
62	};
63
64	spi0_sleep: spi0_sleep {
65		group1 {
66			psels = <NRF_PSEL(SPIM_SCK, 0, 7)>,
67				<NRF_PSEL(SPIM_MOSI, 0, 29)>,
68				<NRF_PSEL(SPIM_MISO, 0, 30)>;
69			low-power-enable;
70		};
71	};
72
73	spi1_default: spi1_default {
74		group1 {
75			psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
76				<NRF_PSEL(SPIM_MOSI, 0, 5)>,
77				<NRF_PSEL(SPIM_MISO, 0, 4)>;
78		};
79	};
80
81	spi1_sleep: spi1_sleep {
82		group1 {
83			psels = <NRF_PSEL(SPIM_SCK, 0, 6)>,
84				<NRF_PSEL(SPIM_MOSI, 0, 5)>,
85				<NRF_PSEL(SPIM_MISO, 0, 4)>;
86			low-power-enable;
87		};
88	};
89
90};
91