1# Copyright (c) 2022-2024 Intel Corporation
2# SPDX-License-Identifier: Apache-2.0
3
4
5config BUILD_OUTPUT_STRIPPED
6	default y
7
8config MP_MAX_NUM_CPUS
9	default 2
10
11# TSC on this board is 1.9 GHz, HPET and APIC are 19.2 MHz
12config SYS_CLOCK_HW_CYCLES_PER_SEC
13	default 1900000000 if APIC_TSC_DEADLINE_TIMER
14	default 1900000000 if APIC_TIMER_TSC
15	default 19200000
16
17if APIC_TIMER
18config APIC_TIMER_IRQ
19	default 24
20endif
21if APIC_TIMER_TSC
22config APIC_TIMER_TSC_M
23	default 3
24config APIC_TIMER_TSC_N
25	default 249
26endif
27
28config ACPI
29	default y
30
31if ACPI
32config HEAP_MEM_POOL_ADD_SIZE_ACPI
33	default 64000000
34config MAIN_STACK_SIZE
35	default 320000
36
37if SHELL
38config SHELL_STACK_SIZE
39	default 320000
40endif # SHELL
41endif # ACPI
42
43if DMA
44config DMA_64BIT
45	default y
46config DMA_DW_HW_LLI
47	default n
48config DMA_DW_CHANNEL_COUNT
49	default 2
50endif
51
52config UART_NS16550_INTEL_LPSS_DMA
53	default y if BOARD_INTEL_RPL_S_CRB
54
55if SHELL
56config SHELL_STACK_SIZE
57	default 320000
58endif
59
60config HAS_COVERAGE_SUPPORT
61	default y
62