1.. _niosv_g:
2
3INTEL FPGA niosv_g
4####################
5
6Overview
7********
8
9niosv_g board is based on Intel FPGA Design Store Nios® V/g Hello World Example Design system and this complete system is consisted of following IP blocks:
10
11.. code-block:: console
12
13	Nios® V/g Processor Intel® FPGA IP
14	JTAG UART Intel® FPGA IP
15	On-Chip Memory Intel® FPGA IP
16
17Nios® V/g hello world example design system
18===========================================
19
20Prebuilt Nios® V/g hello world example design system is available in Intel FPGA Design store.
21- https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?s=Newest
22
23For example, Arria10 Nios® V/g processor example design system prebuilt files can be downloaded from following link.
24- https://www.intel.com/content/www/us/en/design-example/776196/intel-arria-10-fpga-hello-world-design-on-nios-v-g-processor.html
25
26ready_to_test/top.sof file is the prebuilt SRAM Object File for hello world example design system after the downloaded PAR files extracted successfully.
27
28Create Nios® V/g processor example design system in FPGA
29========================================================
30
31Please use Intel Quartus Programmer tool to program Nios® V/g processor based system into the FPGA and execute application.
32
33In order to create the Nios® V/g processor inside the FPGA device, please download the generated .sof file onto the board with the following command.
34
35.. code-block:: console
36
37	quartus_pgm -c 1 -m JTAG -o "p;top.sof@1"
38
39.. code-block:: console
40
41	Note:
42	-c 1 is referring to JTAG cable number connected to the Host Computer.
43	@1 is referring to device index on the JTAG Chain and may differ for your board.
44	top.sof is referring to Nios® V/m processor based system SRAM Object File.
45
46Download Zephyr elf file and run application
47============================================
48
49To download the Zephyr Executable and Linkable Format .elf file, please use the niosv-download command within Nios V Command Shell environment.
50
51.. code-block:: console
52
53	niosv-download -g <elf file>
54
55Use the JTAG UART terminal to print the stdout and stderr of the Nios® V/g processor system.
56
57.. code-block:: console
58
59	juart-terminal
60
61Similar message shown below should be appeared in the JTAG UART terminal when using hello world sample code:
62
63.. code-block:: console
64
65	*** Booting Zephyr OS build zephyr-vn.n.nn  ***
66	Hello World! niosv_g
67