1/* 2 * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h> 8#include <dt-bindings/pinctrl/esp32s3-pinctrl.h> 9#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h> 10 11&pinctrl { 12 uart0_default: uart0_default { 13 group1 { 14 pinmux = <UART0_TX_GPIO43>; 15 output-high; 16 }; 17 group2 { 18 pinmux = <UART0_RX_GPIO44>; 19 bias-pull-up; 20 }; 21 }; 22 23 uart1_default: uart1_default { 24 group1 { 25 pinmux = <UART1_TX_GPIO17>; 26 output-high; 27 }; 28 group2 { 29 pinmux = <UART1_RX_GPIO18>; 30 bias-pull-up; 31 }; 32 }; 33 34 i2c0_default: i2c0_default { 35 group1 { 36 pinmux = <I2C0_SDA_GPIO1>, 37 <I2C0_SCL_GPIO2>; 38 bias-pull-up; 39 drive-open-drain; 40 output-high; 41 }; 42 }; 43 44 i2c1_default: i2c1_default { 45 group1 { 46 pinmux = <I2C1_SDA_GPIO4>, 47 <I2C1_SCL_GPIO5>; 48 bias-pull-up; 49 drive-open-drain; 50 output-high; 51 }; 52 }; 53 54 i2s0_default: i2s0_default { 55 group1 { 56 pinmux = <I2S0_MCLK_GPIO1>, 57 <I2S0_O_WS_GPIO2>, 58 <I2S0_O_BCK_GPIO3>, 59 <I2S0_O_SD_GPIO4>, 60 <I2S0_I_WS_GPIO5>, 61 <I2S0_I_BCK_GPIO6>; 62 output-enable; 63 }; 64 group2 { 65 pinmux = <I2S0_I_SD_GPIO7>; 66 input-enable; 67 }; 68 }; 69 70 i2s1_default: i2s1_default { 71 group1 { 72 pinmux = <I2S1_MCLK_GPIO8>, 73 <I2S1_O_WS_GPIO9>, 74 <I2S1_O_BCK_GPIO10>, 75 <I2S1_O_SD_GPIO11>, 76 <I2S1_I_WS_GPIO12>, 77 <I2S1_I_BCK_GPIO13>; 78 output-enable; 79 }; 80 group2 { 81 pinmux = <I2S1_I_SD_GPIO14>; 82 input-enable; 83 }; 84 }; 85 86 spim2_default: spim2_default { 87 group1 { 88 pinmux = <SPIM2_MISO_GPIO13>, 89 <SPIM2_SCLK_GPIO12>, 90 <SPIM2_CSEL_GPIO10>; 91 }; 92 group2 { 93 pinmux = <SPIM2_MOSI_GPIO11>; 94 output-low; 95 }; 96 }; 97 98 spim3_default: spim3_default { 99 group1 { 100 pinmux = <SPIM3_MISO_GPIO37>, 101 <SPIM3_SCLK_GPIO36>, 102 <SPIM3_CSEL_GPIO38>; 103 }; 104 group2 { 105 pinmux = <SPIM3_MOSI_GPIO39>; 106 output-low; 107 }; 108 }; 109 110 twai_default: twai_default { 111 group1 { 112 pinmux = <TWAI_TX_GPIO5>, 113 <TWAI_RX_GPIO6>; 114 }; 115 }; 116}; 117