1/*
2 * Copyright (c) 2024 DPTechnics bv
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
8#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
9#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
10
11&pinctrl {
12	uart0_default: uart0_default {
13		group1 {
14			pinmux = <UART0_TX_GPIO43>;
15			output-high;
16		};
17		group2 {
18			pinmux = <UART0_RX_GPIO44>;
19			bias-pull-up;
20		};
21	};
22
23	uart1_default: uart1_default {
24		group1 {
25			pinmux = <UART1_TX_GPIO48>;
26			output-high;
27		};
28		group2 {
29			pinmux = <UART1_RX_GPIO14>;
30			bias-pull-up;
31		};
32		group3 {
33			pinmux = <UART1_RTS_GPIO21>;
34			output-high;
35		};
36		group4 {
37			pinmux = <UART1_CTS_GPIO47>;
38		};
39	};
40
41	i2c0_default: i2c0_default {
42		group1 {
43			pinmux = <I2C0_SDA_GPIO1>,
44				 <I2C0_SCL_GPIO2>;
45			bias-pull-up;
46			drive-open-drain;
47			output-high;
48		};
49	};
50
51	i2c1_default: i2c1_default {
52		group1 {
53			pinmux = <I2C1_SDA_GPIO4>,
54				 <I2C1_SCL_GPIO5>;
55			bias-pull-up;
56			drive-open-drain;
57			output-high;
58		};
59	};
60
61	spim2_default: spim2_default {
62		group1 {
63			pinmux = <SPIM2_MISO_GPIO13>,
64				 <SPIM2_SCLK_GPIO12>,
65				 <SPIM2_CSEL_GPIO10>;
66		};
67		group2 {
68			pinmux = <SPIM2_MOSI_GPIO11>;
69			output-low;
70		};
71	};
72
73	spim3_default: spim3_default {
74		group1 {
75			pinmux = <SPIM3_MISO_GPIO37>,
76				 <SPIM3_SCLK_GPIO36>,
77				 <SPIM3_CSEL_GPIO38>;
78		};
79		group2 {
80			pinmux = <SPIM3_MOSI_GPIO39>;
81			output-low;
82		};
83	};
84
85	twai_default: twai_default {
86		group1 {
87			pinmux = <TWAI_TX_GPIO5>,
88				 <TWAI_RX_GPIO6>;
89		};
90	};
91};
92