1/*
2 * Copyright (c) 2023 Cypress Semiconductor Corporation (an Infineon company) or
3 * an affiliate of Cypress Semiconductor Corporation
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <infineon/cat1a/legacy/psoc6-pinctrl.dtsi>
8
9/* Configure pin control bias mode for uart5 pins */
10&p5_1_scb5_uart_tx {
11	drive-push-pull;
12};
13
14&p5_0_scb5_uart_rx {
15	input-enable;
16};
17
18&p9_1_scb2_uart_tx {
19	drive-push-pull;
20};
21
22&p9_0_scb2_uart_rx {
23	input-enable;
24};
25
26&p13_1_scb6_uart_tx {
27	drive-push-pull;
28};
29
30&p13_0_scb6_uart_rx {
31	input-enable;
32};
33
34/* Configure pin control bias mode for SPI pins */
35&p12_0_scb6_spi_m_mosi {
36	drive-push-pull;
37};
38
39&p12_1_scb6_spi_m_miso {
40	input-enable;
41};
42
43&p12_2_scb6_spi_m_clk {
44	drive-push-pull;
45};
46