1/*
2 * Copyright (c) 2022 Nordic Semiconductor
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 6)>,
10				<NRF_PSEL(UART_RX, 0, 5)>;
11		};
12	};
13
14	uart0_sleep: uart0_sleep {
15		group1 {
16			psels = <NRF_PSEL(UART_TX, 0, 6)>,
17				<NRF_PSEL(UART_RX, 0, 5)>;
18			low-power-enable;
19		};
20	};
21
22	uart1_default: uart1_default {
23		group1 {
24			psels = <NRF_PSEL(UART_TX, 0, 0)>,
25				<NRF_PSEL(UART_RX, 0, 1)>;
26		};
27	};
28
29	uart1_sleep: uart1_sleep {
30		group1 {
31			psels = <NRF_PSEL(UART_TX, 0, 0)>,
32				<NRF_PSEL(UART_RX, 0, 1)>;
33			low-power-enable;
34		};
35	};
36
37	uart2_default: uart2_default {
38		group1 {
39			psels = <NRF_PSEL(UART_TX, 0, 24)>,
40				<NRF_PSEL(UART_RX, 0, 23)>;
41		};
42	};
43
44	uart2_sleep: uart2_sleep {
45		group1 {
46			psels = <NRF_PSEL(UART_TX, 0, 24)>,
47				<NRF_PSEL(UART_RX, 0, 23)>;
48			low-power-enable;
49		};
50	};
51
52	i2c1_default: i2c1_default {
53		group1 {
54			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
55				<NRF_PSEL(TWIM_SCL, 0, 27)>;
56		};
57	};
58
59	i2c1_sleep: i2c1_sleep {
60		group1 {
61			psels = <NRF_PSEL(TWIM_SDA, 0, 26)>,
62				<NRF_PSEL(TWIM_SCL, 0, 27)>;
63			low-power-enable;
64		};
65	};
66
67	pwm0_default: pwm0_default {
68		group1 {
69			psels = <NRF_PSEL(PWM_OUT0, 0, 3)>;
70		};
71	};
72
73	pwm0_sleep: pwm0_sleep {
74		group1 {
75			psels = <NRF_PSEL(PWM_OUT0, 0, 3)>;
76			low-power-enable;
77		};
78	};
79
80	spi3_default: spi3_default {
81		group1 {
82			psels = <NRF_PSEL(SPIM_SCK, 0, 11)>,
83				<NRF_PSEL(SPIM_MOSI, 0, 9)>,
84				<NRF_PSEL(SPIM_MISO, 0, 28)>;
85		};
86	};
87
88	spi3_sleep: spi3_sleep {
89		group1 {
90			psels = <NRF_PSEL(SPIM_SCK, 0, 11)>,
91				<NRF_PSEL(SPIM_MOSI, 0, 9)>,
92				<NRF_PSEL(SPIM_MISO, 0, 28)>;
93			low-power-enable;
94		};
95	};
96
97};
98