1/*
2 * Copyright (c) 2020 Erik Larson
3 * Copyright (c) 2020-2022 Jason Kridner, BeagleBoard.org Foundation
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/dts-v1/;
9
10#include <ti/cc1352r7.dtsi>
11#include "beagleconnect_freedom-pinctrl.dtsi"
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13
14#define BTN_GPIO_FLAGS (GPIO_ACTIVE_LOW | GPIO_PULL_UP)
15
16/ {
17	model = "BeagleConnect Freedom";
18	compatible = "beagle,beagleconnect-freedom";
19
20	aliases {
21		led0 = &led0;
22		sw0 = &button0;
23		mcuboot-button0 = &button0;
24		sensor0 = &light;
25		sensor1 = &humidity;
26	};
27
28	chosen {
29		zephyr,sram = &sram0;
30		zephyr,console = &uart0;
31		zephyr,shell-uart = &uart0;
32		zephyr,flash = &flash0;
33		zephyr,ieee802154 = &ieee802154g;
34		zephyr,code-partition = &slot0_partition;
35	};
36
37	gpio_keys {
38		compatible = "gpio-keys";
39		button0: button_0 {
40			gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
41			zephyr,code = <INPUT_KEY_0>;
42		};
43	};
44
45	/**
46	 * The BeagleConnect Freedom has an on-board antenna switch (SKY13317-373LF) used to select
47	 * the appropriate RF signal port based on the currently-used PHY.
48	 *
49	 * Truth table:
50	 *
51	 * Path         DIO29 DIO30
52	 * ===========  ===== =====
53	 * Off          0     0
54	 * Sub-1 GHz    0     1     // DIO30 mux to IOC_PORT_RFC_GPO0 for auto
55	 * 20 dBm TX    1     0     // DIO29 mux to IOC_PORT_RFC_GPO3 for auto
56	 */
57	antenna_mux0: antenna_mux0 {
58		compatible = "skyworks,sky13317";
59		status = "okay";
60		gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>, <&gpio0 30 GPIO_ACTIVE_HIGH>;
61		pinctrl-0 = <&board_ant_tx_pa_off &board_ant_subg_off>;
62		pinctrl-1 = <&board_ant_tx_pa_off &board_ant_subg_on>;
63		pinctrl-2 = <&board_ant_tx_pa_on &board_ant_subg_on>;
64		pinctrl-names = "default", "ant_subg", "ant_subg_pa";
65	};
66
67	leds: leds {
68		compatible = "gpio-leds";
69		led0: led_0 {
70			gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; // 2.4GHz TX/RX
71		};
72	};
73
74	sens_i2c: sensor-switch {
75		status = "okay";
76		compatible = "gpio-i2c-switch";
77		#address-cells = <1>;
78		#size-cells = <0>;
79		controller = <&i2c0>;
80		gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
81
82		light: opt3001-light@44 {
83			status = "okay";
84			compatible = "ti,opt3001";
85			reg = <0x44>;
86		};
87
88		humidity: hdc2010-humidity@41 {
89			status = "okay";
90			compatible = "ti,hdc2010";
91			reg = <0x41>;
92		};
93	};
94};
95
96&flash0 {
97	partitions {
98		compatible = "fixed-partitions";
99		#address-cells = <1>;
100		#size-cells = <1>;
101
102		/* Allocate 128 KiB for mcuboot */
103		boot_partition: partition@0 {
104			label = "mcuboot";
105			reg = <0x00000000 0x00020000>;
106		};
107
108		/* Allocate 568 KiB for application (avoid touching CCFG) */
109		slot0_partition: partition@20000 {
110			label = "image-0";
111			reg = <0x00020000 0x0008e000>;
112		};
113	};
114};
115
116&cpu0 {
117	clock-frequency = <48000000>;
118};
119
120&trng {
121	status = "okay";
122};
123
124&gpio0 {
125	status = "okay";
126};
127
128/* Side away from battery connector (with MSP430) */
129&uart0 {
130	status = "okay";
131	current-speed = <115200>;
132	pinctrl-0 = <&uart0_rx_default &uart0_tx_default>;
133	pinctrl-names = "default";
134};
135
136/* Side with battery connector (with CC1352 and not MSP430) */
137&uart1 {
138	status = "okay";
139	current-speed = <115200>;
140	pinctrl-0 = <&uart1_rx_default &uart1_tx_default>;
141	pinctrl-names = "default";
142};
143
144&i2c0 {
145	status = "okay";
146	clock-frequency = <I2C_BITRATE_FAST>;
147	pinctrl-0 = <&i2c0_scl_default &i2c0_sda_default>;
148	pinctrl-1 = <&i2c0_scl_sleep &i2c0_sda_sleep>;
149	pinctrl-names = "default", "sleep";
150
151	mcu: msp430-usbbridge@4 {
152		compatible = "beagle,usbbridge";
153		reg = <0x4>;
154	};
155};
156
157&spi0 {
158	status = "okay";
159	pinctrl-0 = <&spi0_sck_default &spi0_mosi_default
160		&spi0_miso_default &spi0_cs0_default
161		&spi0_cs1_default &spi0_cs2_default>;
162	pinctrl-names = "default";
163	cs-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>, // SPI flash
164		<&gpio0 28 GPIO_ACTIVE_LOW>,  // mikroBUS port 1
165		<&gpio0 27 GPIO_ACTIVE_LOW>;  // mikroBUS port 2
166
167	spi_flash0: gd25q16c@0 {
168		compatible = "jedec,spi-nor";
169		reg = <0>;
170		spi-max-frequency = <2000000>;
171		size = <0x200000>;
172		//has-be32k;
173		has-dpd;
174		t-enter-dpd = <20000>;
175		t-exit-dpd = <100000>;
176		jedec-id = [c8 40 15];
177
178		partitions {
179			compatible = "fixed-partitions";
180			#address-cells = <1>;
181			#size-cells = <1>;
182
183			/* Allocate 568 KiB for application */
184			slot1_partition: partition@0 {
185				label = "image-1";
186				reg = <0x00000000 0x0008e000>;
187			};
188
189			/* Allocate 128 KiB scratch for image swap */
190			scratch_partition: partition@8e000 {
191				label = "image-scratch";
192				reg = <0x0008e000 0x00020000>;
193			};
194
195			/* Allocate 1 MiB storage partition */
196			storage_partition: partition@ae000 {
197				label = "storage";
198				reg = <0x000ae000 DT_SIZE_K(1024)>;
199			};
200		};
201	};
202};
203
204&ieee802154g {
205	status = "okay";
206};
207
208&gpt0 {
209	status = "okay";
210};
211
212&gpt1 {
213	status = "okay";
214};
215
216&pwm0 {
217	status = "okay";
218	pinctrl-0 = <&pwm0_default>;
219	pinctrl-names = "default";
220};
221
222&pwm1 {
223	status = "okay";
224	pinctrl-0 = <&pwm1_default>;
225	pinctrl-names = "default";
226};
227
228&adc0 {
229	status = "okay";
230
231	#address-cells = <1>;
232	#size-cells = <0>;
233
234	/* MB1 AN */
235	channel@9 {
236		reg = <9>;
237		zephyr,gain = "ADC_GAIN_1";
238		zephyr,reference = "ADC_REF_INTERNAL";
239		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
240		zephyr,resolution = <12>;
241	};
242
243	/* MB2 AN */
244	channel@a {
245		reg = <10>;
246		zephyr,gain = "ADC_GAIN_1";
247		zephyr,reference = "ADC_REF_INTERNAL";
248		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
249		zephyr,resolution = <12>;
250	};
251
252	/* MB1/2 SCL */
253	channel@b {
254		reg = <11>;
255		zephyr,gain = "ADC_GAIN_1";
256		zephyr,reference = "ADC_REF_INTERNAL";
257		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
258		zephyr,resolution = <12>;
259	};
260
261	/* MB1/2 SDA */
262	channel@c {
263		reg = <12>;
264		zephyr,gain = "ADC_GAIN_1";
265		zephyr,reference = "ADC_REF_INTERNAL";
266		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
267		zephyr,resolution = <12>;
268	};
269
270	/* MB2 CS */
271	channel@d {
272		reg = <13>;
273		zephyr,gain = "ADC_GAIN_1";
274		zephyr,reference = "ADC_REF_INTERNAL";
275		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
276		zephyr,resolution = <12>;
277	};
278
279	/* MB1 CS */
280	channel@e {
281		reg = <14>;
282		zephyr,gain = "ADC_GAIN_1";
283		zephyr,reference = "ADC_REF_INTERNAL";
284		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
285		zephyr,resolution = <12>;
286	};
287};
288