1 /*
2 * Copyright (c) 2024 DNDG srl
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6 #include <zephyr/kernel.h>
7 #include <zephyr/init.h>
8 #include <stm32h7xx_ll_bus.h>
9 #include <stm32h7xx_ll_gpio.h>
10
board_gpio_init(void)11 static int board_gpio_init(void)
12 {
13 /* The external oscillator that drives the HSE clock should be enabled
14 * by setting the GPIOI1 pin. This function is registered at priority
15 * RE_KERNEL_1 to be executed before the standard STM clock
16 * setup code.
17 *
18 * Note that the HSE should be turned on by the M7 only because M4
19 * is not booted by default on Opta and cannot configure the clocks
20 * anyway.
21 */
22 #ifdef CONFIG_BOARD_ARDUINO_OPTA_STM32H747XX_M7
23 LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOH);
24 LL_GPIO_SetPinMode(GPIOH, LL_GPIO_PIN_1, LL_GPIO_MODE_OUTPUT);
25 LL_GPIO_SetPinSpeed(GPIOH, LL_GPIO_PIN_1, LL_GPIO_SPEED_FREQ_LOW);
26 LL_GPIO_SetPinOutputType(GPIOH, LL_GPIO_PIN_1, LL_GPIO_OUTPUT_PUSHPULL);
27 LL_GPIO_SetPinPull(GPIOH, LL_GPIO_PIN_1, LL_GPIO_PULL_UP);
28 LL_GPIO_SetOutputPin(GPIOH, LL_GPIO_PIN_1);
29 #endif
30
31 /* The ethernet adapter is enabled by settig the GPIOJ15 pin to 1.
32 * This is done only if the network has been explicitly configured
33 */
34 #ifdef CONFIG_NET_L2_ETHERNET
35 LL_AHB4_GRP1_EnableClock(LL_AHB4_GRP1_PERIPH_GPIOJ);
36 LL_GPIO_SetPinMode(GPIOJ, LL_GPIO_PIN_15, LL_GPIO_MODE_OUTPUT);
37 LL_GPIO_SetPinSpeed(GPIOJ, LL_GPIO_PIN_15, LL_GPIO_SPEED_FREQ_LOW);
38 LL_GPIO_SetPinOutputType(GPIOJ, LL_GPIO_PIN_15, LL_GPIO_OUTPUT_PUSHPULL);
39 LL_GPIO_SetPinPull(GPIOJ, LL_GPIO_PIN_15, LL_GPIO_PULL_UP);
40 LL_GPIO_SetOutputPin(GPIOJ, LL_GPIO_PIN_15);
41 #endif
42
43 return 0;
44 }
45
46 SYS_INIT(board_gpio_init, PRE_KERNEL_1, 0);
47
