1.. zephyr:board:: max32680evkit 2 3Overview 4******** 5 6The MAX32680 evaluation kit (EV kit) provides a platform 7for evaluation capabilities of the MAX32680 microcontroller, 8which is an advanced system-on-chip (SoC) 9designed for industrial and medical sensors. Power regulation 10and management is provided by a single-inductor 11multiple-output (SIMO) buck regulator system and contains 12the latest generation Bluetooth® 5.2 Low Energy 13(LE) radio. 14 15The Zephyr port is running on the MAX32680 MCU. 16 17Hardware 18******** 19 20- MAX32680 MCU: 21 22 - Ultra-Low-Power Wireless Microcontroller 23 24 - Internal 100MHz Oscillator 25 - 512KB Flash and 128KB SRAM, Optional ECC on One 32KB SRAM Bank 26 27 - Bluetooth 5.2 LE Radio 28 29 - Dedicated, Ultra-Low-Power, 32-Bit RISC-VCoprocessor to Offload 30 31 Timing-Critical Bluetooth Processing 32 33 - Fully Open-Source Bluetooth 5.2 Stack Available 34 - Supports AoA, AoD, LE Audio, and Mesh 35 - High-Throughput (2Mbps) Mode•Long-Range (125kbps and 500kbps) Modes 36 - Rx Sensitivity: -97.5dBm; Tx Power: +4.5dBm 37 - Single-Ended Antenna Connection (50Ω) 38 39 - Smart Integration Reduces BOM, Cost, and PCB Size 40 41 - Two 16-Bit to 24-Bit Sigma-Delta ADCs 42 - 12 Channels, Assignable to Either ADC 43 - Flexible Resolution and Sample Rates 44 - 24-Bits at 0.4ksps, 16-Bits at 4ksps 45 - Four External Input, 10-Bit Sigma-Delta ADC 7.8ksps 46 - 12-Bit DAC 47 - On-Die Temperature Sensor 48 - Digital Peripherals: Two SPI, Two I2C, up to FourUART, and up to 36 GPIOs 49 - Timers: Six 32-Bit Timers, Two Watchdog Timers,Two Pulse Trains, 1-Wire® Master 50 51 - Power Management Maximizes Battery Life 52 53 - 2.0V to 3.6V Supply Voltage Range 54 - Integrated SIMO Power Regulator 55 - Dynamic Voltage Scaling (DVS) 56 - 23.8μA/MHz ACTIVE Mode Current at 3.0VCoremark® 57 - 4.4μA at 3.0V Retention Current for 32KB SRAM 58 - Selectable SRAM Retention in Low-Power Modes 59 60 - Robust Security and Reliability 61 62 - TRNG 63 - Secure Nonvolatile Key Storage and AES-128/192/256 64 - Secure Boot to Protect IP/Firmware 65 - Wide, -40°C to +85°C Operating Temperature 66 67- External devices connected to the MAX32680 EVKIT: 68 69 - SMA Connector for Attaching an External Bluetooth Antenna 70 - 128 x 128 (1.45in) Color TFT Display with SPI Interface 71 - Two Selectable On-Board, High-Precision Voltage References 72 - USB 2.0 Micro B to Serial UARTs 73 - UART1 and LPUART0 Interface is Selectable Through On-Board Jumpers 74 - All GPIOs Signals Accessed Through 0.1in Headers 75 - Access to Four Analog Inputs Through SMA Connectors Configured as Differential 76 - Access to Eight Analog Inputs Through 0.1in Headers Configured as Single-End 77 - Optional Discrete Filter for the Twelve Analog Inputs 78 - DAC Accessed Through SMA Connector or Test Point 79 - 10-Pin SWD Connector 80 - 10-Pin RV JTAG Connector 81 - Board Power Provided by USB Port 82 - On-Board 3.3V LDO Regulator to Power MAX32680 Internal SIMO 83 - Test Loops Provided to Supply Optional VCORE Power Externally 84 - Individual Power Measurement on All IC Rails Through Jumpers 85 - Two General Purpose LEDs and Two General Purpose Pushbutton Switches 86 87Supported Features 88================== 89 90Below interfaces are supported by Zephyr on MAX32680EVKIT. 91 92+-----------+------------+-------------------------------------+ 93| Interface | Controller | Driver/Component | 94+===========+============+=====================================+ 95| NVIC | on-chip | nested vector interrupt controller | 96+-----------+------------+-------------------------------------+ 97| SYSTICK | on-chip | systick | 98+-----------+------------+-------------------------------------+ 99| CLOCK | on-chip | clock and reset control | 100+-----------+------------+-------------------------------------+ 101| GPIO | on-chip | gpio | 102+-----------+------------+-------------------------------------+ 103| UART | on-chip | serial | 104+-----------+------------+-------------------------------------+ 105| TRNG | on-chip | entropy | 106+-----------+------------+-------------------------------------+ 107| I2C | on-chip | i2c | 108+-----------+------------+-------------------------------------+ 109| DMA | on-chip | dma controller | 110+-----------+------------+-------------------------------------+ 111| Watchdog | on-chip | watchdog | 112+-----------+------------+-------------------------------------+ 113| SPI | on-chip | spi | 114+-----------+------------+-------------------------------------+ 115| ADC | on-chip | adc | 116+-----------+------------+-------------------------------------+ 117| Timer | on-chip | counter | 118+-----------+------------+-------------------------------------+ 119| W1 | on-chip | one wire master | 120+-----------+------------+-------------------------------------+ 121| Flash | on-chip | flash | 122+-----------+------------+-------------------------------------+ 123 124Connections and IOs 125=================== 126 127+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 128| Name | Name | Settings | Description | 129+===========+===============+===============+==================================================================================================+ 130| JP1 | VREGI | | | 131| | | +-----------+ | +-------------------------------------------------------------------------------+ | 132| | | | Open | | | Disconnects 3.3V power from the MAX32680 SIMO. | | 133| | | +-----------+ | +-------------------------------------------------------------------------------+ | 134| | | | Closed | | | Connects 3.3V power to the MAX32680 SIMO. | | 135| | | +-----------+ | +-------------------------------------------------------------------------------+ | 136| | | | | 137+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 138| JP2 | REF0P | +-----------+ | +-------------------------------------------------------------------------------+ | 139| | | | 2-1 | | | Connects the external high-precision voltage refernce to REF0P. | | 140| | | +-----------+ | +-------------------------------------------------------------------------------+ | 141| | | | 2-3 | | | Connects the internal voltage refernce to REF0P. | | 142| | | +-----------+ | +-------------------------------------------------------------------------------+ | 143| | | | | 144+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 145| JP3 | REF0N | +-----------+ | +-------------------------------------------------------------------------------+ | 146| | | | Open | | | Disconnects REF0N from ground. | | 147| | | +-----------+ | +-------------------------------------------------------------------------------+ | 148| | | | Closed | | | Connects REF0N to ground. | | 149| | | +-----------+ | +-------------------------------------------------------------------------------+ | 150| | | | | 151+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 152| JP4 | VDDIO_AUX | +-----------+ | +-------------------------------------------------------------------------------+ | 153| | | | Open | | | Disconnects VDDIO_AUX from pull-ups and reference voltages. | | 154| | | +-----------+ | +-------------------------------------------------------------------------------+ | 155| | | | Closed | | | Connects VDDIO_AUX to pull-ups and reference voltages. | | 156| | | +-----------+ | +-------------------------------------------------------------------------------+ | 157| | | | | 158+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 159| JP5 | VDDIOH | +-----------+ | +-------------------------------------------------------------------------------+ | 160| | | | Open | | | Connects VREGO_A to VDDIOH. | | 161| | | +-----------+ | +-------------------------------------------------------------------------------+ | 162| | | | Closed | | | Connects the 3.3V from the estrenal LDO to VDDIOH. | | 163| | | +-----------+ | +-------------------------------------------------------------------------------+ | 164| | | | | 165+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 166| JP6 | REF1P | +-----------+ | +-------------------------------------------------------------------------------+ | 167| | | | 2-1 | | | Connects the external high-precision voltage refernce to REF1P. | | 168| | | +-----------+ | +-------------------------------------------------------------------------------+ | 169| | | | 2-3 | | | Connects the internal voltage refernce to REF1P. | | 170| | | +-----------+ | +-------------------------------------------------------------------------------+ | 171| | | | | 172+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 173| JP7 | REF1N | +-----------+ | +-------------------------------------------------------------------------------+ | 174| | | | Open | | | Disconnects REF1N from ground. | | 175| | | +-----------+ | +-------------------------------------------------------------------------------+ | 176| | | | Closed | | | Connects REF1N to ground. | | 177| | | +-----------+ | +-------------------------------------------------------------------------------+ | 178| | | | | 179+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 180| JP8 | I2C0_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | 181| | I2C0_SCL | | 2-1 | | | Connects I2C0 pullups to VDDIO_AUX (1.8V). | | 182| | | +-----------+ | +-------------------------------------------------------------------------------+ | 183| | | | 2-3 | | | Connects I2C0 pullups to 3.3V. | | 184| | | +-----------+ | +-------------------------------------------------------------------------------+ | 185| | | | | 186+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 187| JP9 | I2C1_SDA | +-----------+ | +-------------------------------------------------------------------------------+ | 188| | I2C1_SCL | | 2-1 | | | Connects I2C1 pullups to VDDIO_AUX (1.8V). | | 189| | | +-----------+ | +-------------------------------------------------------------------------------+ | 190| | | | 2-3 | | | Connects I2C1 pullups to 3.3V. | | 191| | | +-----------+ | +-------------------------------------------------------------------------------+ | 192| | | | | 193+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 194| JP10 | P0_24 | +-----------+ | +-------------------------------------------------------------------------------+ | 195| | | | Open | | | Disconnects red LED D1 from P0_24. | | 196| | | +-----------+ | +-------------------------------------------------------------------------------+ | 197| | | | Closed | | | Connects red LED D1 to P0_24. | | 198| | | +-----------+ | +-------------------------------------------------------------------------------+ | 199| | | | | 200+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 201| JP11 | P0_25 | +-----------+ | +-------------------------------------------------------------------------------+ | 202| | | | Open | | | Disconnects green LED D2 from P0_25. | | 203| | | +-----------+ | +-------------------------------------------------------------------------------+ | 204| | | | Closed | | | Connects green LED D2 to P0_25. | | 205| | | +-----------+ | +-------------------------------------------------------------------------------+ | 206| | | | | 207+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 208| JP12 | FSK_IN | +-----------+ | +-------------------------------------------------------------------------------+ | 209| | | | Open | | | Disconnects FSK_IN from HART analog circuitry. | | 210| | | +-----------+ | +-------------------------------------------------------------------------------+ | 211| | | | Closed | | | Connects FSK_IN to HART analog circuitry. | | 212| | | +-----------+ | +-------------------------------------------------------------------------------+ | 213| | | | | 214+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 215| JP13 | RCV_FSK | +-----------+ | +-------------------------------------------------------------------------------+ | 216| | | | Open | | | Disconnects RCV_FSK from CC LOOP. | | 217| | | +-----------+ | +-------------------------------------------------------------------------------+ | 218| | | | Closed | | | Connects RCV_FSK to CC LOOP. | | 219| | | +-----------+ | +-------------------------------------------------------------------------------+ | 220| | | | | 221+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 222| JP14 | FSK_OUT | +-----------+ | +--------------------------------------------------------------------------------+ | 223| | | | Open | | | Disconnects FSK_OUT from HART analog circuitry. | | 224| | | +-----------+ | +--------------------------------------------------------------------------------+ | 225| | | | Closed | | | Connects FSK_OUT to HART analog circuitry. | | 226| | | +-----------+ | +--------------------------------------------------------------------------------+ | 227| | | | | 228+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 229| JP15 | RCV_FSK | +-----------+ | +-------------------------------------------------------------------------------+ | 230| | | | Open | | | Disconnects RCV_FSK from XFMR LOOP. | | 231| | | +-----------+ | +-------------------------------------------------------------------------------+ | 232| | | | Closed | | | Connects RCV_FSK to XFMR LOOP. | | 233| | | +-----------+ | +-------------------------------------------------------------------------------+ | 234| | | | | 235+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 236| JP16 | RLOAD | +-----------+ | +-------------------------------------------------------------------------------+ | 237| | | | Open | | | Disconnects 249 ohm resistor shunt from CC LOOP. | | 238| | | +-----------+ | +-------------------------------------------------------------------------------+ | 239| | | | Closed | | | Connects 249 ohm resistor shunt to CC LOOP. | | 240| | | +-----------+ | +-------------------------------------------------------------------------------+ | 241| | | | | 242+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 243| JP17 | FSK AMP GAIN | +-----------+ | +-------------------------------------------------------------------------------+ | 244| | | | Open | | | Enables FSK variable amp gain. | | 245| | | +-----------+ | +-------------------------------------------------------------------------------+ | 246| | | | Closed | | | Disables FSK variable amp gain. | | 247| | | +-----------+ | +-------------------------------------------------------------------------------+ | 248| | | | | 249+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 250| JP18 | AMP BYPASS | +-----------+ | +-------------------------------------------------------------------------------+ | 251| | | | 2-1 | | | Enables FSK amp. | | 252| | | +-----------+ | +-------------------------------------------------------------------------------+ | 253| | | | 2-3 | | | Bypasses FSK amp. | | 254| | | +-----------+ | +-------------------------------------------------------------------------------+ | 255| | | | | 256+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 257| JP19 | FSK AMP GAIN | +-----------+ | +-------------------------------------------------------------------------------+ | 258| | | | Open | | | Enables FSK fixed amp gain. | | 259| | | +-----------+ | +-------------------------------------------------------------------------------+ | 260| | | | Closed | | | Disables FSK fixed amp gain. | | 261| | | +-----------+ | +-------------------------------------------------------------------------------+ | 262| | | | | 263+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 264| JP20 | HART_RTS | +-----------+ | +-------------------------------------------------------------------------------+ | 265| | | | Open | | | Enables HART_RTS optical transceiver. | | 266| | | +-----------+ | +-------------------------------------------------------------------------------+ | 267| | | | Closed | | | Bypasses HART_RTS optical transceiver. | | 268| | | +-----------+ | +-------------------------------------------------------------------------------+ | 269| | | | | 270+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 271| JP21 | RLOAD | +-----------+ | +-------------------------------------------------------------------------------+ | 272| | | | Open | | | Disconnects 249 ohm resistor shunt from XFMR LOOP. | | 273| | | +-----------+ | +-------------------------------------------------------------------------------+ | 274| | | | Closed | | | Connects 249 ohm resistor shunt to XFMR LOOP. | | 275| | | +-----------+ | +-------------------------------------------------------------------------------+ | 276| | | | | 277+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 278| JP22 | UART0_RX | +-----------+ | +-------------------------------------------------------------------------------+ | 279| | | | 2-1 | | | Disconnects the USB - serial bridge from UART1_RX (P0.12). | | 280| | | +-----------+ | +-------------------------------------------------------------------------------+ | 281| | | | 2-3 | | | Connects the USB - serial bridge to LPUART_RX (P2.6). | | 282| | | +-----------+ | +-------------------------------------------------------------------------------+ | 283| | | | | 284+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 285| JP23 | UART0_TX | +-----------+ | +-------------------------------------------------------------------------------+ | 286| | | | 2-1 | | | Disonnects the USB - serial bridge from UART1_TX (P0.13). | | 287| | | +-----------+ | +-------------------------------------------------------------------------------+ | 288| | | | 2-3 | | | Connects the USB - serial bridge to LPUART_TX (P2.7). | | 289| | | +-----------+ | +-------------------------------------------------------------------------------+ | 290| | | | | 291+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 292| JP24 | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 293| | | HART_IN | | | Open | | | Disconnects TX of USB - serial bridge from HART_IN (P0.1) | | 294| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 295| | | HART_IN | | | 1-2 | | | Connects TX of USB - serial bridge to HART_IN (P0.1). | | 296| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 297| | | HART_OUT | | | Open | | | Disconnects RX of USB - serial bridge from HART_OUT (P0.0). | | 298| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 299| | | HART_OUT | | | 2-3 | | | Connects RX of USB - serial bridge to HART_OUT (P0.0). | | 300| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 301| | | HART_RTS | | | Open | | | Disconnects RTS of USB - serial bridge from HART_RTS (P0.3). | | 302| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 303| | | HART_RTS | | | 3-4 | | | Connects TX of USB - serial bridge to HART_RTS (P0.3). | | 304| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 305| | | HART_OCD | | | Open | | | Disconnects RTS of USB - serial bridge from HART_OCD (P0.2). | | 306| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 307| | | HART_OCD | | | 4-5 | | | Connects TX of USB - serial bridge to HART_OCD (P0.2). | | 308| | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | 309| | | | | 310+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 311| JP25 | RSTN | +-----------+ | +-------------------------------------------------------------------------------+ | 312| | | | Open | | | Disconnects DUT_3V3_RSTN from RSTN. | | 313| | | +-----------+ | +-------------------------------------------------------------------------------+ | 314| | | | Close | | | Connects DUT_3V3_RSTN to RSTN. | | 315| | | +-----------+ | +-------------------------------------------------------------------------------+ | 316| | | | | 317+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ 318 319Programming and Debugging 320************************* 321 322Flashing 323======== 324 325The MAX32680 MCU can be flashed by connecting an external debug probe to the 326SWD port. SWD debug can be accessed through the Cortex 10-pin connector, JH10. 327Logic levels are set to 1.8V (VDDIO_AUX). 328 329Once the debug probe is connected to your host computer, then you can simply run the 330``west flash`` command to write a firmware image into flash. 331 332Debugging 333========= 334 335Please refer to the `Flashing`_ section and run the ``west debug`` command 336instead of ``west flash``. 337 338References 339********** 340 341- `MAX32680EVKIT web page`_ 342 343.. _MAX32680EVKIT web page: 344 https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/max32680evkit.html#eb-overview 345
