1/* 2 * Copyright (c) 2023-2024 Analog Devices, Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8 9#include <adi/max32/max32666.dtsi> 10#include <adi/max32/max32666-pinctrl.dtsi> 11#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h> 12#include <zephyr/dt-bindings/input/input-event-codes.h> 13#include <zephyr/dt-bindings/dma/max32666_dma.h> 14 15/ { 16 model = "Analog Devices MAX32666FTHR"; 17 compatible = "adi,max32666fthr"; 18 19 chosen { 20 zephyr,console = &uart1; 21 zephyr,shell-uart = &uart1; 22 zephyr,sram = &sram4; 23 zephyr,flash = &flash0; 24 }; 25 26 leds { 27 compatible = "gpio-leds"; 28 led1: led_1 { 29 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>; 30 label = "Red LED"; 31 }; 32 led2: led_2 { 33 gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; 34 label = "Blue LED"; 35 }; 36 led3: led_3 { 37 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>; 38 label = "Green LED"; 39 }; 40 }; 41 42 buttons { 43 compatible = "gpio-keys"; 44 pb1: pb1 { 45 gpios = <&gpio1 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; 46 label = "SW1"; 47 zephyr,code = <INPUT_KEY_0>; 48 }; 49 }; 50 51 /* These aliases are provided for compatibility with samples */ 52 aliases { 53 led0 = &led1; 54 led1 = &led2; 55 led2 = &led3; 56 sw0 = &pb1; 57 watchdog0 = &wdt0; 58 }; 59 60 /* Used for accessing other pins */ 61 feather_header: feather_connector { 62 compatible = "adafruit-feather-header"; 63 #gpio-cells = <2>; 64 gpio-map-mask = <0xffffffff 0xffffffc0>; 65 gpio-map-pass-thru = <0 0x3f>; 66 gpio-map = <12 0 &gpio0 7 0>, /* SDA */ 67 <13 0 &gpio0 6 0>, /* SCL */ 68 <14 0 &gpio0 0 0>, /* GPIO */ 69 <15 0 &gpio0 1 0>, /* GPIO */ 70 <16 0 &gpio0 2 0>, /* GPIO */ 71 <17 0 &gpio0 4 0>, /* GPIO */ 72 <18 0 &gpio0 5 0>, /* GPIO */ 73 <19 0 &gpio0 3 0>, /* GPIO */ 74 <20 0 &gpio0 12 0>, /* OWM */ 75 /* 11 not connected */ 76 <10 0 &gpio0 9 0>, /* TX */ 77 <9 0 &gpio0 10 0>, /* RX */ 78 <8 0 &gpio0 26 0>, /* MISO */ 79 <7 0 &gpio0 25 0>, /* MOSI */ 80 <6 0 &gpio0 27 0>, /* SCK */ 81 <5 0 &gpio0 21 0>, /* AIN5 */ 82 <4 0 &gpio0 20 0>, /* AIN4 */ 83 <3 0 &gpio0 19 0>, /* AIN3 */ 84 <2 0 &gpio0 18 0>, /* AIN2 */ 85 <1 0 &gpio0 17 0>, /* AIN1 */ 86 <0 0 &gpio0 16 0>; /* AIN0 */ 87 }; 88}; 89 90&uart1 { 91 pinctrl-0 = <&uart1_tx_p1_13 &uart1_rx_p1_12>; 92 pinctrl-names = "default"; 93 current-speed = <115200>; 94 data-bits = <8>; 95 parity = "none"; 96 status = "okay"; 97}; 98 99&clk_ipo { 100 status = "okay"; 101}; 102 103&dma0 { 104 status = "okay"; 105}; 106 107&gpio0 { 108 status = "okay"; 109}; 110 111&gpio1 { 112 status = "okay"; 113}; 114 115&trng { 116 status = "okay"; 117}; 118 119&wdt0 { 120 status = "okay"; 121}; 122 123&rtc_counter { 124 status = "okay"; 125}; 126 127&spi1 { 128 status = "okay"; 129 pinctrl-0 = <&spi1_mosi_p0_17 &spi1_miso_p0_18 &spi1_sck_p0_19 &spi1_ss0_p0_16>; 130 pinctrl-names = "default"; 131}; 132 133&w1 { 134 pinctrl-0 = <&owm_io_p0_12>; 135 pinctrl-names = "default"; 136}; 137