1/*
2 * Copyright (c) 2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8
9#include <adi/max32/max32662.dtsi>
10#include <adi/max32/max32662-pinctrl.dtsi>
11#include <zephyr/dt-bindings/gpio/adi-max32-gpio.h>
12#include <zephyr/dt-bindings/input/input-event-codes.h>
13#include <zephyr/dt-bindings/dma/max32662_dma.h>
14#include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15
16/ {
17	model = "Analog Devices MAX32662EVKIT";
18	compatible = "adi,max32662evkit";
19
20	chosen {
21		zephyr,console = &uart0;
22		zephyr,shell-uart = &uart0;
23		zephyr,sram = &sram2;
24		zephyr,flash = &flash0;
25		zephyr,display = &st7735;
26	};
27
28	leds {
29		compatible = "gpio-leds";
30		led1: led_1 {
31			gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
32			label = "Red LED";
33		};
34	};
35
36	buttons {
37		compatible = "gpio-keys";
38		pb1: pb1 {
39			gpios = <&gpio0 6 (GPIO_PULL_UP | GPIO_ACTIVE_LOW
40						| MAX32_GPIO_VSEL_VDDIOH)>;
41			label = "SW3";
42			zephyr,code = <INPUT_KEY_0>;
43		};
44	};
45
46	/* These aliases are provided for compatibility with samples */
47	aliases {
48		led0 = &led1;
49		sw0 = &pb1;
50		watchdog0 = &wdt0;
51	};
52
53	mipi_dbi {
54		compatible = "zephyr,mipi-dbi-spi";
55		spi-dev = <&spi1>;
56		#address-cells = <1>;
57		#size-cells = <0>;
58
59		status = "okay";
60
61		st7735: st7735@0 {
62			compatible = "sitronix,st7735r";
63			mipi-max-frequency = <DT_FREQ_M(6)>;
64			mipi-mode = "MIPI_DBI_MODE_SPI_3WIRE";
65
66			reg = <0>;
67			width = <130>;
68			height = <132>;
69			x-offset = <0>;
70			y-offset = <0>;
71			madctl = <0xc0>;
72			colmod = <0x05>;
73			vmctr1 = <0x51>;
74			pwctr1 = [02 02];
75			pwctr2 = [c5];
76			pwctr3 = [0d 00];
77			pwctr4 = [8d 1a];
78			pwctr5 = [8d ee];
79			frmctr1 = [02 35 36];
80			frmctr2 = [02 35 36];
81			frmctr3 = [02 35 36 02 35 36];
82			gamctrp1 = [0a 1c 0c 14 33 2b 24 28 27 25 2c 39 00 05 03 0d];
83			gamctrn1 = [0a 1c 0c 14 33 2b 24 28 27 25 2d 3a 00 05 03 0d];
84		};
85	};
86};
87
88&uart0 {
89	pinctrl-0 = <&uart0a_tx_p0_10 &uart0a_rx_p0_11>;
90	pinctrl-names = "default";
91	current-speed = <115200>;
92	data-bits = <8>;
93	parity = "none";
94	status = "okay";
95};
96
97&clk_ipo {
98	status = "okay";
99};
100
101&dma0 {
102	status = "okay";
103};
104
105/*
106 * ERTCO is required for counter RTC
107 */
108&clk_ertco {
109	status = "okay";
110};
111
112&gpio0 {
113	status = "okay";
114};
115
116&i2c1 {
117	status = "okay";
118	pinctrl-0 = <&i2c1a_scl_p0_6 &i2c1a_sda_p0_9>;
119	pinctrl-names = "default";
120};
121
122&trng {
123	status = "okay";
124};
125
126&wdt0 {
127	status = "okay";
128};
129
130&rtc_counter {
131	status = "okay";
132};
133
134&spi0 {
135	status = "okay";
136	pinctrl-0 = <&spi0a_copi_p0_3 &spi0a_cito_p0_2 &spi0a_sck_p0_4 &spi0a_ts0_p0_5>;
137	pinctrl-names = "default";
138};
139
140&spi1a_mosi_p0_8 {
141	power-source=<MAX32_VSEL_VDDIOH>;
142};
143
144&spi1a_sck_p0_17 {
145	power-source=<MAX32_VSEL_VDDIOH>;
146};
147
148&spi1 {
149	status = "okay";
150	pinctrl-0 = <&spi1a_mosi_p0_8 &spi1a_sck_p0_17>;
151	pinctrl-names = "default";
152	cs-gpios = <&gpio0 18 (GPIO_ACTIVE_LOW | MAX32_VSEL_VDDIOH)>;
153};
154