1/*
2 * Copyright (c) 2022 Actinius
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6&pinctrl {
7	uart0_default: uart0_default {
8		group1 {
9			psels = <NRF_PSEL(UART_TX, 0, 9)>,
10				<NRF_PSEL(UART_RX, 0, 6)>;
11		};
12	};
13
14	uart0_sleep: uart0_sleep {
15		group1 {
16			psels = <NRF_PSEL(UART_TX, 0, 9)>,
17				<NRF_PSEL(UART_RX, 0, 6)>;
18			low-power-enable;
19		};
20	};
21
22	i2c2_default: i2c2_default {
23		group1 {
24			psels = <NRF_PSEL(TWIM_SDA, 0, 10)>,
25				<NRF_PSEL(TWIM_SCL, 0, 11)>;
26		};
27	};
28
29	i2c2_sleep: i2c2_sleep {
30		group1 {
31			psels = <NRF_PSEL(TWIM_SDA, 0, 10)>,
32				<NRF_PSEL(TWIM_SCL, 0, 11)>;
33			low-power-enable;
34		};
35	};
36
37	spi3_default: spi3_default {
38		group1 {
39			psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,
40				<NRF_PSEL(SPIM_MOSI, 0, 25)>,
41				<NRF_PSEL(SPIM_MISO, 0, 21)>;
42		};
43	};
44
45	spi3_sleep: spi3_sleep {
46		group1 {
47			psels = <NRF_PSEL(SPIM_SCK, 0, 22)>,
48				<NRF_PSEL(SPIM_MOSI, 0, 25)>,
49				<NRF_PSEL(SPIM_MISO, 0, 21)>;
50			low-power-enable;
51		};
52	};
53
54	neopixel_spi_default: neopixel_spi_default {
55		group1 {
56			psels = <NRF_PSEL(SPIM_SCK, 0, 0)>,
57				<NRF_PSEL(SPIM_MOSI, 0, 8)>,
58				<NRF_PSEL(SPIM_MISO, 0, 0)>;
59		};
60	};
61
62	neopixel_spi_sleep: neopixel_spi_sleep {
63		group1 {
64			psels = <NRF_PSEL(SPIM_SCK, 0, 0)>,
65				<NRF_PSEL(SPIM_MOSI, 0, 8)>,
66				<NRF_PSEL(SPIM_MISO, 0, 0)>;
67			low-power-enable;
68		};
69	};
70
71	pwm0_default: pwm0_default {
72		group1 {
73			psels = <NRF_PSEL(PWM_OUT0, 0, 3)>;
74			nordic,invert;
75		};
76	};
77
78	pwm0_sleep: pwm0_sleep {
79		group1 {
80			psels = <NRF_PSEL(PWM_OUT0, 0, 3)>;
81			low-power-enable;
82		};
83	};
84
85};
86