1.. _96b_meerkat96: 2 396Boards Meerkat96 4################## 5 6Overview 7******** 8 996Boards Meerkat96 board is based on NXP i.MX7 Hybrid multi-core processor, 10composed of a dual Cortex®-A7 and a single Cortex®-M4 core. 11Zephyr OS is ported to run on the Cortex®-M4 core. 12 13- Board features: 14 15 - RAM: 512 Mbyte 16 - Storage: 17 18 - microSD Socket 19 - Wireless: 20 21 - WiFi: 2.4GHz IEEE 802.11b/g/n 22 - Bluetooth: v4.1 (BR/EDR) 23 - USB: 24 25 - Host - 2x type A 26 - OTG: - 1x type micro-B 27 - HDMI 28 - Connectors: 29 30 - 40-Pin Low Speed Header 31 - 60-Pin High Speed Header 32 - LEDs: 33 34 - 4x Green user LEDs 35 - 1x Blue Bluetooth LED 36 - 1x Yellow WiFi LED 37 38.. image:: img/96b_meerkat96.jpg 39 :align: center 40 :alt: 96Boards Meerkat96 41 42More information about the board can be found at the 43`96Boards website`_. 44 45Hardware 46******** 47 48The i.MX7 SoC provides the following hardware capabilities: 49 50- Dual Cortex A7 (800MHz/1.0GHz) core and Single Cortex M4 (200MHz) core 51 52- Memory 53 54 - External DDR memory up to 1 Gbyte 55 - Internal RAM -> A7: 256KB SRAM 56 - Internal RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR) 57 58- Display 59 60 - RGB 1920x1080x24bpp 61 - 4-wire Resistive touch 62 63- Multimedia 64 65 - 1x Camera Parallel Interface 66 - 1x Analog Audio Line in (Stereo) 67 - 1x Analog Audio Mic in (Mono) 68 - 1x Analog Audio Headphone out (Stereo) 69 70- Connectivity 71 72 - USB 2.0 OTG (High Speed) 73 - USB 2.0 host (High Speed) 74 - 10/100 Mbit/s Ethernet PHY 75 - 4x I2C 76 - 4x SPI 77 - 7x UART 78 - 1x IrDA 79 - 20x PWM 80 - Up to 125 GPIO 81 - 4x Analog Input (12 Bit) 82 - 2x SDIO/SD/MMC (8 Bit) 83 - 2x CAN 84 85More information about the i.MX7 SoC can be found here: 86 87- `i.MX 7 Series Website`_ 88- `i.MX 7 Dual Datasheet`_ 89- `i.MX 7 Dual Reference Manual`_ 90 91Supported Features 92================== 93 94The Zephyr 96b_meerkat96 board configuration supports the following hardware 95features: 96 97+-----------+------------+-------------------------------------+ 98| Interface | Controller | Driver/Component | 99+===========+============+=====================================+ 100| NVIC | on-chip | nested vector interrupt controller | 101+-----------+------------+-------------------------------------+ 102| SYSTICK | on-chip | systick | 103+-----------+------------+-------------------------------------+ 104| GPIO | on-chip | gpio | 105+-----------+------------+-------------------------------------+ 106| UART | on-chip | serial port-polling; | 107| | | serial port-interrupt | 108+-----------+------------+-------------------------------------+ 109 110The default configuration can be found in the defconfig file: 111 112 :zephyr_file:`boards/96boards/meerkat96/96b_meerkat96_mcimx7d_m4_defconfig` 113 114Other hardware features are not currently supported by the port. 115 116Connections and IOs 117=================== 118 11996Boards Meerkat96 board was tested with the following pinmux controller 120configuration. 121 122+---------------+-----------------+---------------------------+ 123| Board Name | SoC Name | Usage | 124+===============+=================+===========================+ 125| UART_1 RXD | UART1_TXD | UART Console | 126+---------------+-----------------+---------------------------+ 127| UART_1 TXD | UART1_RXD | UART Console | 128+---------------+-----------------+---------------------------+ 129| LED_R1 | GPIO1_IO04 | LED0 | 130+---------------+-----------------+---------------------------+ 131| LED_R2 | GPIO1_IO05 | LED1 | 132+---------------+-----------------+---------------------------+ 133| LED_R3 | GPIO1_IO06 | LED2 | 134+---------------+-----------------+---------------------------+ 135| LED_R4 | GPIO1_IO07 | LED3 | 136+---------------+-----------------+---------------------------+ 137 138System Clock 139============ 140 141The M4 Core is configured to run at a 200 MHz clock speed. 142 143Serial Port 144=========== 145 146The iMX7D SoC has seven UARTs. UART_1 is configured for the console and 147the remaining are not used/tested. 148 149Programming and Debugging 150************************* 151 152The 96Boards Meerkat96 board doesn't have QSPI flash for the M4 and it needs 153to be started by the A7 core. The A7 core is responsible to load the M4 binary 154application into the RAM, put the M4 in reset, set the M4 Program Counter and 155Stack Pointer, and get the M4 out of reset. The A7 can perform these steps at 156bootloader level or after the Linux system has booted. 157 158The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and M4: 159 160+------------+-----------------------+------------------------+-----------------------+----------------------+ 161| Region | Cortex-A7 | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus) | Size | 162+============+=======================+========================+=======================+======================+ 163| DDR | 0x80000000-0xFFFFFFFF | 0x80000000-0xDFFFFFFF | 0x10000000-0x1FFEFFFF | 2048MB (less for M4) | 164+------------+-----------------------+------------------------+-----------------------+----------------------+ 165| OCRAM | 0x00900000-0x0091FFFF | 0x20200000-0x2021FFFF | 0x00900000-0x0091FFFF | 128KB | 166+------------+-----------------------+------------------------+-----------------------+----------------------+ 167| TCMU | 0x00800000-0x00807FFF | 0x20000000-0x20007FFF | | 32KB | 168+------------+-----------------------+------------------------+-----------------------+----------------------+ 169| TCML | 0x007F8000-0x007FFFFF | | 0x1FFF8000-0x1FFFFFFF | 32KB | 170+------------+-----------------------+------------------------+-----------------------+----------------------+ 171| OCRAM_S | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF | 0x00000000-0x00007FFF | 32KB | 172+------------+-----------------------+------------------------+-----------------------+----------------------+ 173| QSPI Flash | | | 0x08000000-0x0BFFFFFF | 64MB | 174+------------+-----------------------+------------------------+-----------------------+----------------------+ 175 176For more information about memory mapping see the 177`i.MX 7 Dual Reference Manual`_ (section 2.1.2 and 2.1.3), and the 178`Toradex Wiki`_. 179 180At compilation time you have to choose which RAM will be used. This 181configuration is done in the file :zephyr_file:`boards/96boards/meerkat96/96b_meerkat96_mcimx7d_m4.dts` 182with "zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties. 183The available configurations are: 184 185.. code-block:: none 186 187 "zephyr,flash" 188 - &ddr_code 189 - &tcml_code 190 - &ocram_code 191 - &ocram_s_code 192 - &ocram_pxp_code 193 - &ocram_epdc_code 194 195 "zephyr,sram" 196 - &ddr_sys 197 - &tcmu_sys 198 - &ocram_sys 199 - &ocram_s_sys 200 - &ocram_pxp_sys 201 - &ocram_epdc_sys 202 203 204Below you will find the instructions to load and run Zephyr on M4 from 205A7 using u-boot. 206 207Copy the compiled zephyr.bin to the first FAT partition of the SD card and 208plug into the board. Power it up and stop the u-boot execution. 209Set the u-boot environment variables and run the zephyr.bin from the 210appropriated memory configured in the Zephyr compilation: 211 212.. code-block:: console 213 214 setenv bootm4 'fatload mmc 0:1 $m4addr $m4fw && dcache flush && bootaux $m4addr' 215 # TCML 216 setenv m4tcml 'setenv m4fw zephyr.bin; setenv m4addr 0x007F8000' 217 setenv bootm4tcml 'run m4tcml && run bootm4' 218 run bootm4tcml 219 # TCMU 220 setenv m4tcmu 'setenv m4fw zephyr.bin; setenv m4addr 0x00800000' 221 setenv bootm4tcmu 'run m4tcmu && run bootm4' 222 run bootm4tcmu 223 # OCRAM 224 setenv m4ocram 'setenv m4fw zephyr.bin; setenv m4addr 0x00900000' 225 setenv bootm4ocram 'run m4ocram && run bootm4' 226 run bootm4ocram 227 # OCRAM_S 228 setenv m4ocrams 'setenv m4fw zephyr.bin; setenv m4addr 0x00180000' 229 setenv bootm4ocrams 'run m4ocrams && run bootm4' 230 run bootm4ocrams 231 # DDR 232 setenv m4ddr 'setenv m4fw zephyr.bin; setenv m4addr 0x80000000' 233 setenv bootm4ddr 'run m4ddr && run bootm4' 234 run bootm4ddr 235 236Debugging 237========= 238 23996Boards Meerkat96 board can be debugged by connecting an external JLink 240JTAG debugger to the J4 debug connector. Then download and install 241`J-Link Tools`_ and `NXP iMX7D Connect CortexM4.JLinkScript`_. 242 243To run Zephyr Binary using J-Link create the following script in order to 244get the Program Counter and Stack Pointer from zephyr.bin. 245 246get-pc-sp.sh: 247.. code-block:: console 248 249 #!/bin/sh 250 251 firmware=$1 252 253 pc=$(od -An -N 8 -t x4 $firmware | awk '{print $2;}') 254 sp=$(od -An -N 8 -t x4 $firmware | awk '{print $1;}') 255 256 echo pc=$pc 257 echo sp=$sp 258 259 260Get the SP and PC from firmware binary: ``./get-pc-sp.sh zephyr.bin`` 261.. code-block:: console 262 263 pc=00900f01 264 sp=00905020 265 266Plug in the J-Link into the board and PC and run the J-Link command line tool: 267 268.. code-block:: console 269 270 /usr/bin/JLinkExe -device Cortex-M4 -if JTAG -speed 4000 -autoconnect 1 -jtagconf -1,-1 -jlinkscriptfile iMX7D_Connect_CortexM4.JLinkScript 271 272The following steps are necessary to run the zephyr.bin: 273 2741. Put the M4 core in reset 2752. Load the binary in the appropriate addr (TMCL, TCMU, OCRAM, OCRAM_S or DDR) 2763. Set PC (Program Counter) 2774. Set SP (Stack Pointer) 2785. Get the M4 core out of reset 279 280Issue the following commands inside J-Link commander: 281 282.. code-block:: console 283 284 w4 0x3039000C 0xAC 285 loadfile zephyr.bin,0x00900000 286 w4 0x00180000 00900f01 287 w4 0x00180004 00905020 288 w4 0x3039000C 0xAA 289 290With these mechanisms, applications for the ``96b_meerkat96`` board 291configuration can be built and debugged in the usual way (see 292:ref:`build_an_application` and :ref:`application_run` for more details). 293 294References 295========== 296 297- `Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors`_ 298- `J-Link iMX7D Instructions`_ 299 300.. _96Boards website: 301 https://www.96boards.org/product/imx7-96/ 302 303.. _i.MX 7 Series Website: 304 https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-7-processors:IMX7-SERIES?fsrch=1&sr=1&pageNum=1 305 306.. _i.MX 7 Dual Datasheet: 307 https://www.nxp.com/docs/en/data-sheet/IMX7DCEC.pdf 308 309.. _i.MX 7 Dual Reference Manual: 310 https://www.nxp.com/webapp/Download?colCode=IMX7DRM 311 312.. _J-Link Tools: 313 https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack 314 315.. _NXP iMX7D Connect CortexM4.JLinkScript: 316 https://wiki.segger.com/images/8/86/NXP_iMX7D_Connect_CortexM4.JLinkScript 317 318.. _Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors: 319 https://www.nxp.com/docs/en/application-note/AN5317.pdf 320 321.. _J-Link iMX7D Instructions: 322 https://wiki.segger.com/IMX7D 323 324.. _Toradex Wiki: 325 https://developer.toradex.com/knowledge-base/freertos-on-the-cortex-m4-of-a-colibri-imx7#Memory_areas 326