1/* 2 * Copyright (c) 2017 Linaro Limited 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8#include <st/f4/stm32f401Xe.dtsi> 9#include <st/f4/stm32f401r(d-e)tx-pinctrl.dtsi> 10#include "96b_lscon.dtsi" 11#include <zephyr/dt-bindings/input/input-event-codes.h> 12 13/ { 14 model = "Seeed Studio Carbon 96boards"; 15 compatible = "seeed,carbon"; 16 17 chosen { 18 zephyr,console = &usart1; 19 zephyr,shell-uart = &usart1; 20 zephyr,sram = &sram0; 21 zephyr,flash = &flash0; 22 zephyr,code-partition = &slot0_partition; 23 zephyr,bt-hci = &hci_spi; 24 }; 25 26 leds { 27 compatible = "gpio-leds"; 28 green_led_1: led_1 { 29 gpios = <&gpiod 2 GPIO_ACTIVE_HIGH>; 30 label = "USR1 LED"; 31 }; 32 green_led_2: led_2 { 33 gpios = <&gpioa 15 GPIO_ACTIVE_HIGH>; 34 label = "USR2 LED"; 35 }; 36 bt_blue_led: led_3 { 37 gpios = <&gpiob 5 GPIO_ACTIVE_HIGH>; 38 label = "BT LED"; 39 }; 40 }; 41 42 gpio_keys { 43 compatible = "gpio-keys"; 44 user_button: button { 45 label = "User"; 46 gpios = <&gpiob 2 GPIO_ACTIVE_LOW>; 47 zephyr,code = <INPUT_KEY_0>; 48 }; 49 }; 50 51 aliases { 52 led0 = &green_led_1; 53 led1 = &green_led_2; 54 led2 = &bt_blue_led; 55 sw0 = &user_button; 56 }; 57}; 58 59&clk_lsi { 60 status = "okay"; 61}; 62 63&clk_hse { 64 clock-frequency = <DT_FREQ_M(16)>; 65 status = "okay"; 66}; 67 68&pll { 69 div-m = <16>; 70 mul-n = <336>; 71 div-p = <4>; 72 div-q = <7>; 73 clocks = <&clk_hse>; 74 status = "okay"; 75}; 76 77&rcc { 78 clocks = <&pll>; 79 clock-frequency = <DT_FREQ_M(84)>; 80 ahb-prescaler = <1>; 81 apb1-prescaler = <2>; 82 apb2-prescaler = <1>; 83}; 84 85&usart1 { 86 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; 87 pinctrl-names = "default"; 88 current-speed = <115200>; 89 status = "okay"; 90}; 91 92&usart2 { 93 pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; 94 pinctrl-names = "default"; 95 current-speed = <115200>; 96 status = "okay"; 97}; 98 99&usart6 { 100 pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>; 101 pinctrl-names = "default"; 102 current-speed = <115200>; 103 status = "okay"; 104}; 105 106&i2c1 { 107 pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>; 108 pinctrl-names = "default"; 109 status = "okay"; 110 clock-frequency = <I2C_BITRATE_FAST>; 111}; 112 113&i2c2 { 114 pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb3>; 115 pinctrl-names = "default"; 116 status = "okay"; 117 clock-frequency = <I2C_BITRATE_FAST>; 118}; 119 120&spi1 { 121 status = "okay"; 122 123 pinctrl-0 = <&spi1_miso_pa6 &spi1_mosi_pa7 124 &spi1_sck_pa5 &spi1_nss_pa4>; 125 pinctrl-names = "default"; 126 127 /* Nordic nRF51822-QFAC */ 128 hci_spi: bt-hci@0 { 129 compatible = "zephyr,bt-hci-spi"; 130 reg = <0>; 131 reset-gpios = <&gpiob 4 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 132 irq-gpios = <&gpiob 1 GPIO_ACTIVE_HIGH>; 133 spi-max-frequency = <2000000>; 134 }; 135}; 136 137&spi2 { 138 pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13 139 &spi2_miso_pb14 &spi2_mosi_pb15>; 140 pinctrl-names = "default"; 141 status = "okay"; 142}; 143 144zephyr_udc0: &usbotg_fs { 145 pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; 146 pinctrl-names = "default"; 147 status = "okay"; 148}; 149 150&flash0 { 151 152 partitions { 153 compatible = "fixed-partitions"; 154 #address-cells = <1>; 155 #size-cells = <1>; 156 157 boot_partition: partition@0 { 158 label = "mcuboot"; 159 reg = <0x00000000 DT_SIZE_K(32)>; 160 read-only; 161 }; 162 163 /* 164 * The flash starting at offset 0x00008000 and ending at 165 * offset 0x0001ffff (sectors 2 through 4) is reserved for 166 * use by the application. 167 */ 168 169 slot0_partition: partition@20000 { 170 label = "image-0"; 171 reg = <0x00020000 DT_SIZE_K(128)>; 172 }; 173 slot1_partition: partition@40000 { 174 label = "image-1"; 175 reg = <0x00040000 DT_SIZE_K(128)>; 176 }; 177 scratch_partition: partition@60000 { 178 label = "image-scratch"; 179 reg = <0x00060000 DT_SIZE_K(128)>; 180 }; 181 }; 182}; 183 184&rtc { 185 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, 186 <&rcc STM32_SRC_LSI RTC_SEL(2)>; 187 status = "okay"; 188}; 189