1 /* 2 * Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com> 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_ 8 #define ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_ 9 10 #include <zephyr/offsets.h> 11 12 #define _thread_offset_to_sp \ 13 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_sp_OFFSET) 14 15 #define _thread_offset_to_ra \ 16 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_ra_OFFSET) 17 18 #define _thread_offset_to_s0 \ 19 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s0_OFFSET) 20 21 #define _thread_offset_to_s1 \ 22 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s1_OFFSET) 23 24 #define _thread_offset_to_s2 \ 25 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s2_OFFSET) 26 27 #define _thread_offset_to_s3 \ 28 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s3_OFFSET) 29 30 #define _thread_offset_to_s4 \ 31 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s4_OFFSET) 32 33 #define _thread_offset_to_s5 \ 34 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s5_OFFSET) 35 36 #define _thread_offset_to_s6 \ 37 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s6_OFFSET) 38 39 #define _thread_offset_to_s7 \ 40 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s7_OFFSET) 41 42 #define _thread_offset_to_s8 \ 43 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s8_OFFSET) 44 45 #define _thread_offset_to_s9 \ 46 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s9_OFFSET) 47 48 #define _thread_offset_to_s10 \ 49 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s10_OFFSET) 50 51 #define _thread_offset_to_s11 \ 52 (___thread_t_callee_saved_OFFSET + ___callee_saved_t_s11_OFFSET) 53 54 #define _thread_offset_to_swap_return_value \ 55 (___thread_t_arch_OFFSET + ___thread_arch_t_swap_return_value_OFFSET) 56 57 #if defined(CONFIG_FPU_SHARING) 58 59 #define _thread_offset_to_exception_depth \ 60 (___thread_t_arch_OFFSET + ___thread_arch_t_exception_depth_OFFSET) 61 62 #endif 63 64 #ifdef CONFIG_USERSPACE 65 66 #define _curr_cpu_arch_user_exc_sp \ 67 (___cpu_t_arch_OFFSET + ___cpu_arch_t_user_exc_sp_OFFSET) 68 69 #define _curr_cpu_arch_user_exc_tmp0 \ 70 (___cpu_t_arch_OFFSET + ___cpu_arch_t_user_exc_tmp0_OFFSET) 71 72 #define _curr_cpu_arch_user_exc_tmp1 \ 73 (___cpu_t_arch_OFFSET + ___cpu_arch_t_user_exc_tmp1_OFFSET) 74 75 #endif 76 77 #endif /* ZEPHYR_ARCH_RISCV_INCLUDE_OFFSETS_SHORT_ARCH_H_ */ 78