1 /* 2 * Copyright (c) 2020 Linaro Ltd. 3 * Copyright (c) 2021 Nordic Semiconductor ASA 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 /** 9 * @file 10 * STM32 SoC specific helpers for pinctrl driver 11 */ 12 13 #ifndef ZEPHYR_SOC_ARM_ST_STM32_COMMON_PINCTRL_SOC_H_ 14 #define ZEPHYR_SOC_ARM_ST_STM32_COMMON_PINCTRL_SOC_H_ 15 16 #include <zephyr/devicetree.h> 17 #include <zephyr/types.h> 18 19 #ifdef CONFIG_SOC_SERIES_STM32F1X 20 #include <zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h> 21 #else 22 #include <zephyr/dt-bindings/pinctrl/stm32-pinctrl.h> 23 #endif 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 /** @cond INTERNAL_HIDDEN */ 30 31 /** Type for STM32 pin. */ 32 typedef struct pinctrl_soc_pin { 33 /** Pinmux settings (port, pin and function). */ 34 uint32_t pinmux; 35 /** Pin configuration (bias, drive and slew rate). */ 36 uint32_t pincfg; 37 } pinctrl_soc_pin_t; 38 39 /** 40 * @brief Utility macro to initialize pinmux field in #pinctrl_pin_t. 41 * 42 * @param node_id Node identifier. 43 */ 44 #define Z_PINCTRL_STM32_PINMUX_INIT(node_id) DT_PROP(node_id, pinmux) 45 46 /** 47 * @brief Definitions used to initialize fields in #pinctrl_pin_t 48 */ 49 #define STM32_NO_PULL 0x0 50 #define STM32_PULL_UP 0x1 51 #define STM32_PULL_DOWN 0x2 52 #define STM32_PUSH_PULL 0x0 53 #define STM32_OPEN_DRAIN 0x1 54 #define STM32_OUTPUT_LOW 0x0 55 #define STM32_OUTPUT_HIGH 0x1 56 #define STM32_GPIO_OUTPUT 0x1 57 58 #ifdef CONFIG_SOC_SERIES_STM32F1X 59 /** 60 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t (F1). 61 * 62 * @param node_id Node identifier. 63 */ 64 #define Z_PINCTRL_STM32_PINCFG_INIT(node_id) \ 65 (((STM32_NO_PULL * DT_PROP(node_id, bias_disable)) << STM32_PUPD_SHIFT) | \ 66 ((STM32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << STM32_PUPD_SHIFT) | \ 67 ((STM32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << STM32_PUPD_SHIFT) | \ 68 ((STM32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << STM32_CNF_OUT_0_SHIFT) | \ 69 ((STM32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << STM32_CNF_OUT_0_SHIFT) | \ 70 ((STM32_OUTPUT_LOW * DT_PROP(node_id, output_low)) << STM32_ODR_SHIFT) | \ 71 ((STM32_OUTPUT_HIGH * DT_PROP(node_id, output_high)) << STM32_ODR_SHIFT) | \ 72 (DT_ENUM_IDX(node_id, slew_rate) << STM32_MODE_OSPEED_SHIFT)) 73 #else 74 /** 75 * @brief Utility macro to initialize pincfg field in #pinctrl_pin_t (non-F1). 76 * 77 * @param node_id Node identifier. 78 */ 79 #define Z_PINCTRL_STM32_PINCFG_INIT(node_id) \ 80 (((STM32_NO_PULL * DT_PROP(node_id, bias_disable)) << STM32_PUPDR_SHIFT) | \ 81 ((STM32_PULL_UP * DT_PROP(node_id, bias_pull_up)) << STM32_PUPDR_SHIFT) | \ 82 ((STM32_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << STM32_PUPDR_SHIFT) | \ 83 ((STM32_PUSH_PULL * DT_PROP(node_id, drive_push_pull)) << STM32_OTYPER_SHIFT) | \ 84 ((STM32_OPEN_DRAIN * DT_PROP(node_id, drive_open_drain)) << STM32_OTYPER_SHIFT) | \ 85 ((STM32_OUTPUT_LOW * DT_PROP(node_id, output_low)) << STM32_ODR_SHIFT) | \ 86 ((STM32_OUTPUT_HIGH * DT_PROP(node_id, output_high)) << STM32_ODR_SHIFT) | \ 87 ((STM32_GPIO_OUTPUT * DT_PROP(node_id, output_low)) << STM32_MODER_SHIFT) | \ 88 ((STM32_GPIO_OUTPUT * DT_PROP(node_id, output_high)) << STM32_MODER_SHIFT) | \ 89 (DT_ENUM_IDX(node_id, slew_rate) << STM32_OSPEEDR_SHIFT)) 90 #endif /* CONFIG_SOC_SERIES_STM32F1X */ 91 92 /** 93 * @brief Utility macro to initialize each pin. 94 * 95 * @param node_id Node identifier. 96 * @param state_prop State property name. 97 * @param idx State property entry index. 98 */ 99 #define Z_PINCTRL_STATE_PIN_INIT(node_id, state_prop, idx) \ 100 { .pinmux = Z_PINCTRL_STM32_PINMUX_INIT( \ 101 DT_PROP_BY_IDX(node_id, state_prop, idx)), \ 102 .pincfg = Z_PINCTRL_STM32_PINCFG_INIT( \ 103 DT_PROP_BY_IDX(node_id, state_prop, idx)) }, 104 105 /** 106 * @brief Utility macro to initialize state pins contained in a given property. 107 * 108 * @param node_id Node identifier. 109 * @param prop Property name describing state pins. 110 */ 111 #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop) \ 112 {DT_FOREACH_PROP_ELEM(node_id, prop, Z_PINCTRL_STATE_PIN_INIT)} 113 114 /** @endcond */ 115 116 #ifdef __cplusplus 117 } 118 #endif 119 120 #endif /* ZEPHYR_SOC_ARM_ST_STM32_COMMON_PINCTRL_SOC_H_ */ 121
