1 /*
2 * Copyright (c) 2018, Piotr Mienkowski
3 * Copyright (c) 2023, Antmicro <www.antmicro.com>
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7 #include <zephyr/kernel.h>
8 #include <zephyr/logging/log.h>
9 #include <zephyr/pm/pm.h>
10 #include <em_emu.h>
11
12 LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
13
14 /*
15 * Power state map:
16 * PM_STATE_RUNTIME_IDLE: EM1 Sleep
17 * PM_STATE_SUSPEND_TO_IDLE: EM2 Deep Sleep
18 * PM_STATE_STANDBY: EM3 Stop
19 * PM_STATE_SOFT_OFF: EM4
20 */
21
22 /* Invoke Low Power/System Off specific Tasks */
pm_state_set(enum pm_state state,uint8_t substate_id)23 void pm_state_set(enum pm_state state, uint8_t substate_id)
24 {
25 ARG_UNUSED(substate_id);
26
27 LOG_DBG("SoC entering power state %d", state);
28
29 /* FIXME: When this function is entered the Kernel has disabled
30 * interrupts using BASEPRI register. This is incorrect as it prevents
31 * waking up from any interrupt which priority is not 0. Work around the
32 * issue and disable interrupts using PRIMASK register as recommended
33 * by ARM.
34 */
35
36 /* Set PRIMASK */
37 __disable_irq();
38 /* Set BASEPRI to 0 */
39 irq_unlock(0);
40
41 switch (state) {
42 case PM_STATE_RUNTIME_IDLE:
43 EMU_EnterEM1();
44 break;
45 case PM_STATE_SUSPEND_TO_IDLE:
46 EMU_EnterEM2(true);
47 break;
48 case PM_STATE_STANDBY:
49 EMU_EnterEM3(true);
50 break;
51 case PM_STATE_SOFT_OFF:
52 EMU_EnterEM4();
53 break;
54 default:
55 LOG_DBG("Unsupported power state %u", state);
56 break;
57 }
58
59 LOG_DBG("SoC leaving power state %d", state);
60
61 /* Clear PRIMASK */
62 __enable_irq();
63 }
64
65 /* Handle SOC specific activity after Low Power Mode Exit */
pm_state_exit_post_ops(enum pm_state state,uint8_t substate_id)66 void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id)
67 {
68 ARG_UNUSED(state);
69 ARG_UNUSED(substate_id);
70 }
71
