1 /* 2 * Copyright 2023 NXP 3 * 4 * Based on zephyr/soc/soc_legacy/arm/nxp_kinetis/ke1xf/soc.c, which is: 5 * Copyright (c) 2019-2021 Vestas Wind Systems A/S 6 * 7 * SPDX-License-Identifier: Apache-2.0 8 */ 9 10 #include <zephyr/kernel.h> 11 #include <zephyr/device.h> 12 #include <zephyr/init.h> 13 #include <zephyr/sys/barrier.h> 14 15 #include <cmsis_core.h> 16 #include <OsIf.h> 17 18 #if defined(CONFIG_HAS_MCUX_CACHE) 19 #include <fsl_cache.h> 20 #endif 21 22 #if defined(CONFIG_WDOG_INIT) z_arm_watchdog_init(void)23void z_arm_watchdog_init(void) 24 { 25 /* 26 * NOTE: DO NOT SINGLE STEP THROUGH THIS SECTION!!! Watchdog 27 * reconfiguration must take place within 128 bus clocks from 28 * unlocking. Single stepping through the code will cause the 29 * watchdog to close the unlock window again. 30 */ 31 if ((IP_WDOG->CS & WDOG_CS_CMD32EN_MASK) != 0U) { 32 IP_WDOG->CNT = WDOG_UPDATE_KEY; 33 } else { 34 IP_WDOG->CNT = WDOG_UPDATE_KEY & 0xFFFFU; 35 IP_WDOG->CNT = (WDOG_UPDATE_KEY >> 16U) & 0xFFFFU; 36 } 37 while (!(IP_WDOG->CS & WDOG_CS_ULK_MASK)) { 38 ; 39 } 40 41 IP_WDOG->TOVAL = 0xFFFFU; 42 IP_WDOG->CS = (uint32_t) ((IP_WDOG->CS) & ~WDOG_CS_EN_MASK) | WDOG_CS_UPDATE_MASK; 43 44 /* Wait for new configuration to take effect */ 45 while (!(IP_WDOG->CS & WDOG_CS_RCS_MASK)) { 46 ; 47 } 48 } 49 #endif /* CONFIG_WDOG_INIT */ 50 soc_init(void)51static int soc_init(void) 52 { 53 #if !defined(CONFIG_ARM_MPU) 54 uint32_t tmp; 55 56 /* 57 * Disable memory protection and clear slave port errors. 58 * Note that the S32K1xx does not implement the optional Arm MPU but 59 * instead the Soc includes its own NXP MPU module. 60 */ 61 tmp = IP_MPU->CESR; 62 tmp &= ~MPU_CESR_VLD_MASK; 63 tmp |= MPU_CESR_SPERR0_MASK | MPU_CESR_SPERR1_MASK 64 | MPU_CESR_SPERR2_MASK | MPU_CESR_SPERR3_MASK; 65 IP_MPU->CESR = tmp; 66 #endif /* !CONFIG_ARM_MPU */ 67 68 #if defined(CONFIG_HAS_MCUX_CACHE) && defined(CONFIG_NXP_S32_ENABLE_CODE_CACHE) 69 L1CACHE_EnableCodeCache(); 70 barrier_isync_fence_full(); 71 #endif 72 73 OsIf_Init(NULL); 74 75 return 0; 76 } 77 78 SYS_INIT(soc_init, PRE_KERNEL_1, 0); 79
