1# Copyright 2022-2024 NXP 2# SPDX-License-Identifier: Apache-2.0 3 4if SOC_SERIES_RW6XX 5 6config ROM_START_OFFSET 7 default 0x400 if BOOTLOADER_MCUBOOT 8 default 0x1300 if NXP_RW6XX_BOOT_HEADER 9 10config NUM_IRQS 11 default 129 12if MCUX_OS_TIMER 13 14config SYS_CLOCK_HW_CYCLES_PER_SEC 15 default 1000000 16 17endif # MCUX_OS_TIMER 18 19if CORTEX_M_SYSTICK 20 21config SYS_CLOCK_HW_CYCLES_PER_SEC 22 default 260000000 23 24endif # CORTEX_M_SYSTICK 25 26# The base address is determined from the zephyr,flash node with the following 27# precedence: 28# FlexSPI base address (if flash node is on a FlexSPI bus) 29# node reg property (used for memory regions such as SRAM) 30 31# Workaround for not being able to have commas in macro arguments 32 33DT_CHOSEN_Z_FLASH := zephyr,flash 34DT_COMPAT_FLEXSPI := nxp,imx-flexspi 35 36# Macros to shorten Kconfig definitions 37DT_CHOSEN_FLASH_NODE := $(dt_chosen_path,$(DT_CHOSEN_Z_FLASH)) 38DT_CHOSEN_FLASH_PARENT := $(dt_node_parent,$(DT_CHOSEN_FLASH_NODE)) 39 40config FLASH_BASE_ADDRESS 41 default $(dt_node_reg_addr_hex,$(DT_CHOSEN_FLASH_PARENT),1) \ 42 if $(dt_node_has_compat,$(DT_CHOSEN_FLASH_PARENT),$(DT_COMPAT_FLEXSPI)) 43 default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) 44 45# The RW6xx has no internal flash. If the flash node has a size property, 46# use that over the reg property. This is used for the external flash 47# present on the board. Otherwise, fallback to the reg property 48config FLASH_SIZE 49 default $(dt_node_int_prop_int,$(DT_CHOSEN_FLASH_NODE),size,Kb) \ 50 if $(dt_node_has_prop,$(DT_CHOSEN_FLASH_NODE),size) 51 default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_FLASH),0,K) 52 53if NXP_RW_ROM_RAMLOADER 54 55FLASH_BASE := $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH)) 56FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@134000,1) 57config BUILD_OUTPUT_ADJUST_LMA 58 default "$(FLEXSPI_BASE) - $(FLASH_BASE)" 59 60endif # NXP_RW_ROM_RAMLOADER 61 62if FLASH_MCUX_FLEXSPI_XIP 63 64# Avoid RWW hazards by defaulting logging to disabled 65choice FLASH_LOG_LEVEL_CHOICE 66 default FLASH_LOG_LEVEL_OFF 67endchoice 68 69choice MEMC_LOG_LEVEL_CHOICE 70 default MEMC_LOG_LEVEL_OFF 71endchoice 72 73# Code relocation is needed when MEMC driver is enabled 74config CODE_DATA_RELOCATION_SRAM 75 default y if MEMC 76 77endif # FLASH_MCUX_FLEXSPI_XIP 78 79choice USB_MCUX_CONTROLLER_TYPE 80 default USB_DC_NXP_EHCI 81endchoice 82 83if BT 84 85config FLASH 86 default y 87 88config BT_DIS_MANUF 89 default "NXP" 90 91config BT_BUF_EVT_DISCARDABLE_SIZE 92 default 84 93 94config BT_HCI_ACL_FLOW_CONTROL 95 default n 96 97config HCI_NXP_ENABLE_AUTO_SLEEP 98 default y 99 100config HCI_NXP_SET_CAL_DATA 101 default y 102 103config HEAP_MEM_POOL_SIZE 104 default 256 105 106endif # BT 107 108config NXP_MONOLITHIC_BT 109 default y if BT 110 111config NXP_FW_LOADER 112 default y if (BT || WIFI) 113 114config NXP_RF_IMU 115 default y if (BT || WIFI) 116 117endif # SOC_SERIES_RW6XX 118