1 /* 2 * Copyright (c) 2019 ML!PA Consulting GmbH 3 * Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com> 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 #ifndef _SOC_ATMEL_SAM0_SAME51_SOC_H_ 9 #define _SOC_ATMEL_SAM0_SAME51_SOC_H_ 10 11 #ifndef _ASMLANGUAGE 12 13 #define DONT_USE_CMSIS_INIT 14 15 #include <zephyr/types.h> 16 17 18 #if defined(CONFIG_SOC_SAME51J18A) 19 #include <same51j18a.h> 20 #elif defined(CONFIG_SOC_SAME51J19A) 21 #include <same51j19a.h> 22 #elif defined(CONFIG_SOC_SAME51J20A) 23 #include <same51j20a.h> 24 #elif defined(CONFIG_SOC_SAME51N19A) 25 #include <same51n19a.h> 26 #elif defined(CONFIG_SOC_SAME51N20A) 27 #include <same51n20a.h> 28 #else 29 #error Library does not support the specified device. 30 #endif 31 32 #endif /* _ASMLANGUAGE */ 33 34 #include "sercom_fixup_samd5x.h" 35 #include "tc_fixup_samd5x.h" 36 #include "adc_fixup_sam0.h" 37 #include "../common/soc_port.h" 38 #include "../common/atmel_sam0_dt.h" 39 40 #define SOC_ATMEL_SAM0_OSC32K_FREQ_HZ 32768 41 #define SOC_ATMEL_SAM0_DFLL48_FREQ_HZ 48000000 42 43 /** Processor Clock (HCLK) Frequency */ 44 #define SOC_ATMEL_SAM0_HCLK_FREQ_HZ CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 45 /** Master Clock (MCK) Frequency */ 46 #define SOC_ATMEL_SAM0_MCK_FREQ_HZ SOC_ATMEL_SAM0_HCLK_FREQ_HZ 47 #define SOC_ATMEL_SAM0_GCLK0_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ 48 #define SOC_ATMEL_SAM0_GCLK2_FREQ_HZ 48000000 49 50 #endif /* _SOC_ATMEL_SAM0_SAME51_SOC_H_ */ 51
