1 /*
2  * Copyright (c) 2016 Linaro Limited.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file Interrupt numbers for the ARM LTD Beetle SoC.
9  */
10 #ifndef _ARM_BEETLE_SOC_IRQ_H_
11 #define _ARM_BEETLE_SOC_IRQ_H_
12 
13 /* IRQ Numbers */
14 #define IRQ_SPARE               1  /* Undefined                             */
15 #define IRQ_I2C0                3  /* I2C 0 Interrupt                       */
16 #define IRQ_I2C1                4  /* I2C 1 Interrupt                       */
17 #define IRQ_RTC                 5  /* RTC Interrupt                         */
18 #define IRQ_SPI0                11 /* SPI 0 Interrupt                       */
19 #define IRQ_UARTOVF             12 /* Common UART Overflow Interrupt        */
20 #define IRQ_SPI1                13 /* SPI 1 Interrupt                       */
21 #define IRQ_QSPI                14 /* QUAD SPI Interrupt                    */
22 #define IRQ_DMA                 15 /* Reserved for DMA Interrupt            */
23 #define IRQ_PORT0_0             16 /* All P0 I/O pins used as irq source    */
24 #define IRQ_PORT0_1             17 /* There are 16 pins in total            */
25 #define IRQ_PORT0_2             18
26 #define IRQ_PORT0_3             19
27 #define IRQ_PORT0_4             20
28 #define IRQ_PORT0_5             21
29 #define IRQ_PORT0_6             22
30 #define IRQ_PORT0_7             23
31 #define IRQ_PORT0_8             24
32 #define IRQ_PORT0_9             25
33 #define IRQ_PORT0_10            26
34 #define IRQ_PORT0_11            27
35 #define IRQ_PORT0_12            28
36 #define IRQ_PORT0_13            29
37 #define IRQ_PORT0_14            30
38 #define IRQ_PORT0_15            31
39 #define IRQ_SYSERROR            32 /* System Error Interrupt                */
40 #define IRQ_EFLASH              33 /* Embedded Flash Interrupt              */
41 #define IRQ_LLCC_TXCMD_EMPTY    34 /* Cordio                                 */
42 #define IRQ_LLCC_TXEVT_EMPTY    35 /* Cordio                                 */
43 #define IRQ_LLCC_TXDMAH_DONE    36 /* Cordio                                 */
44 #define IRQ_LLCC_TXDMAL_DONE    37 /* Cordio                                 */
45 #define IRQ_LLCC_RXCMD_VALID    38 /* Cordio                                 */
46 #define IRQ_LLCC_RXEVT_VALID    39 /* Cordio                                 */
47 #define IRQ_LLCC_RXDMAH_DONE    40 /* Cordio                                 */
48 #define IRQ_LLCC_RXDMAL_DONE    41 /* Cordio                                 */
49 #define IRQ_TRNG                44 /* Random number generator Interrupt     */
50 
51 #endif /* _ARM_BEETLE_SOC_IRQ_H_ */
52