1 /*
2  * Copyright (c) 2010-2014 Wind River Systems, Inc.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_ARCH_X86_IA32_EXPCEPTION_H_
8 #define ZEPHYR_INCLUDE_ARCH_X86_IA32_EXPCEPTION_H_
9 
10 #ifndef _ASMLANGUAGE
11 #include <zephyr/types.h>
12 
13 #ifdef __cplusplus
14 extern "C" {
15 #endif
16 
17 /**
18  * @brief Exception Stack Frame
19  *
20  * A pointer to an "exception stack frame" (ESF) is passed as an argument
21  * to exception handlers registered via nanoCpuExcConnect().  As the system
22  * always operates at ring 0, only the EIP, CS and EFLAGS registers are pushed
23  * onto the stack when an exception occurs.
24  *
25  * The exception stack frame includes the volatile registers (EAX, ECX, and
26  * EDX) as well as the 5 non-volatile registers (EDI, ESI, EBX, EBP and ESP).
27  * Those registers are pushed onto the stack by _ExcEnt().
28  */
29 
30 struct arch_esf {
31 #ifdef CONFIG_GDBSTUB
32 	unsigned int ss;
33 	unsigned int gs;
34 	unsigned int fs;
35 	unsigned int es;
36 	unsigned int ds;
37 #endif
38 	unsigned int esp;
39 	unsigned int ebp;
40 	unsigned int ebx;
41 	unsigned int esi;
42 	unsigned int edi;
43 	unsigned int edx;
44 	unsigned int eax;
45 	unsigned int ecx;
46 	unsigned int errorCode;
47 	unsigned int eip;
48 	unsigned int cs;
49 	unsigned int eflags;
50 };
51 
52 extern unsigned int z_x86_exception_vector;
53 
54 struct _x86_syscall_stack_frame {
55 	uint32_t eip;
56 	uint32_t cs;
57 	uint32_t eflags;
58 
59 	/* These are only present if cs = USER_CODE_SEG */
60 	uint32_t esp;
61 	uint32_t ss;
62 };
63 
64 #ifdef __cplusplus
65 }
66 #endif
67 
68 #endif /* _ASMLANGUAGE */
69 
70 #endif /* ZEPHYR_INCLUDE_ARCH_X86_IA32_EXPCEPTION_H_ */
71