1# Copyright 2022-2024 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4description: Software Watchdog Timer (SWT)
5
6compatible: "nxp,s32-swt"
7
8include: base.yaml
9
10properties:
11  reg:
12    required: true
13
14  interrupts:
15    required: true
16
17  clocks:
18    required: true
19
20  master-access-mask:
21    type: int
22    default: 0xff
23    description: |
24      Each bit set on this mask enables access to this watchdog for the platform
25      bus master corresponding to the bit. The platform bus master assignments
26      are chip-specific.
27      Defaults to access enabled for all masters (hardware reset value).
28
29  reset-on-invalid-access:
30    type: boolean
31    description: |
32      Set this flag to generate a reset on respond to an invalid access.
33
34  service-mode:
35    type: string
36    default: "fixed"
37    enum:
38      - "fixed"
39      - "keyed"
40    description: |
41      Watchdog service mode:
42        - fixed: writes a fixed sequence as defined by hardware.
43        - keyed: writes two pseudo-random key values based on an initial key.
44      Defaults to "fixed" (hardware reset value).
45
46  initial-key:
47    type: int
48    default: 0
49    description: |
50      Overrides the initial key when using keyed service mode.
51      Defaults to 0 (hardware reset value).
52
53  lock-mode:
54    type: string
55    default: "unlocked"
56    enum:
57      - "unlocked"
58      - "soft-lock"
59      - "hard-lock"
60    description: |
61      Lock mechanism that provides write access protection to the configuration
62      and service registers:
63        - unlocked: registers are always writable.
64        - soft: unlocked by writing an unlock sequence to the service register.
65        - hard: unlocked only after a reset.
66      Defaults to unlocked (hardware reset value).
67