1# Copyright 2022-2023 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5  NXP S32 GPIO controller.
6
7  The GPIO controller provides the option to route external input pad interrupts
8  to either the SIUL2 EIRQ interrupt controller or, when available on the SoC,
9  the WKPU interrupt controller. By default, GPIO interrupts are routed to the
10  SIUL2 EIRQ interrupt controller.
11
12  To route external interrupts to the WKPU interrupt controller, the GPIO
13  specifier must be supplied with the flag `NXP_S32_GPIO_INT_WKPU`. For example,
14  the following snippet of devicetree source code instructs the GPIO controller
15  to route the interrupt from pin 9 of `gpioa` to the WKPU interrupt controller:
16
17    #include <zephyr/dt-bindings/gpio/nxp-s32-gpio.h>
18
19    &device {
20        gpios = <&gpioa 9 (NXP_S32_GPIO_INT_WKPU | GPIO_ACTIVE_HIGH)>;
21    };
22
23  Explicitly specifying the routing of a GPIO interrupt to a particular
24  interrupt controller allows for the allocation of distinct interrupt
25  priorities according to application-specific requirements. This is owing to
26  the fact that each interrupt controller features its own interrupt vector.
27  To illustrate, it is plausible to allocate the board's button interrupts to
28  the interrupt controller configured with a lower priority compared to the one
29  designated for the data-ready interrupt originating from a sensor. This
30  decision is justified by the potentially higher importance of the latter
31  interrupt to the overall system operation.
32
33  The `NXP_S32_GPIO_INT_WKPU` flag is intended exclusively for specifying WKPU
34  as the interrupt controller for the corresponding GPIO. It's worth noting that
35  despite being named WKPU, the flag is not meant to configure GPIOs as wake-up
36  sources.
37
38compatible: "nxp,s32-gpio"
39
40include: [gpio-controller.yaml, base.yaml]
41
42properties:
43  reg:
44    required: true
45
46  reg-names:
47    required: true
48
49  interrupts:
50    description: |
51      For GPIO ports that have pins can be used for processing
52      external interrupt signal, this is a list of GPIO pins and
53      respective external interrupt lines (<gpio-pin eirq-line>).
54
55  nxp,wkpu:
56    type: phandle
57    description: |
58      NXP WKPU controller associated to this GPIO port.
59
60  nxp,wkpu-interrupts:
61    type: array
62    description: |
63      Map between WKPU external interrupt sources and pins of this GPIO port,
64      as in a tuple `<gpio-pin wkpu-interrupt-source>`.
65
66  "#gpio-cells":
67    const: 2
68
69gpio-cells:
70  - pin
71  - flags
72