1# Copyright (C) 2020 Gerson Fernando Budke <nandojve@gmail.com> 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 GPIO pins exposed on Atmel Xplained headers. 6 7 The Xplained layout provide a standard 10 pin header. A board can have 8 one or more headers and can share pins. This connector was developed to 9 match with Atmel AVR XMEGA devices GPIO port plus power signals. The Atmel 10 Xplained Pro standard connector keep compatibility with this header and it 11 can be defined on every board with an Xplained Pro Connector extension and 12 every pin can be defined as general purpose GPIO. 13 14 The AVR XMEGA port was designed as: 15 16 Signal Main Function 17 Px0 SDA 18 Px1 SCL 19 Px2 RX 20 Px3 TX 21 Px4 SS 22 Px5 MOSI 23 Px6 MISO 24 Px7 SCK 25 GND 26 VDD 27 28 Documentation: 29 https://www.microchip.com/development-tools/xplained-boards 30 http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-42091-Atmel-Xplained-Pro-Hardware-Development-Kit_User%20Guide.pdf 31 32 This binding provides a nexus mapping for 10 pins where pins are disposed 33 to have a even and odd column: 34 35 Connector 36 Bind Pin Name Pin Pin Pin Name Bind 37 0 I2C(SDA) 1 2 I2C(SCL) 1 38 2 UART(RX) 3 4 UART(TX) 3 39 4 SPI(CS0) 5 6 SPI(MOSI) 5 40 6 SPI(MISO) 7 8 SPI(SCK) 7 41 GND 9 10 VDD(+3.3V) 42 43compatible: "atmel-xplained-header" 44 45include: [gpio-nexus.yaml, base.yaml] 46
