1/*
2 * Device Tree Source for the R-Car H3/M3 (R8A77951/R8A77961) SoC
3 *
4 * Copyright (C) 2023 EPAM Systems.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8#include <arm64/armv8-a.dtsi>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <zephyr/dt-bindings/clock/renesas_cpg_mssr.h>
11#include <zephyr/dt-bindings/clock/r8a7795_cpg_mssr.h>
12
13/ {
14	#address-cells = <2>;
15	#size-cells = <2>;
16
17	psci {
18		compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
19		method = "smc";
20	};
21
22	arch_timer: timer {
23		compatible = "arm,armv8-timer";
24		interrupt-parent = <&gic>;
25		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
26			     <GIC_PPI 14 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
27			     <GIC_PPI 11 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
28			     <GIC_PPI 10 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
29	};
30
31	reg_3p3v: regulator_3p3v {
32		compatible = "regulator-fixed";
33		regulator-name = "reg_3p3v";
34		regulator-min-microvolt = <3300000>;
35		regulator-max-microvolt = <3300000>;
36		regulator-always-on;
37		regulator-boot-on;
38		status = "okay";
39	};
40
41	reg_1p8v: regulator_1p8v {
42		compatible = "regulator-fixed";
43		regulator-name = "reg_1p8v";
44		regulator-min-microvolt = <1800000>;
45		regulator-max-microvolt = <1800000>;
46		regulator-always-on;
47		regulator-boot-on;
48		status = "okay";
49	};
50
51	gic: interrupt-controller@f1010000 {
52		compatible = "arm,gic-400", "arm,gic-v2", "arm,gic" ;
53		#interrupt-cells = <4>;
54		#address-cells = <0>;
55		interrupt-controller;
56		reg = <0 0xf1010000 0 0x1000>,
57		      <0 0xf1020000 0 0x20000>;
58		status = "okay";
59	};
60
61	soc: soc {
62		compatible = "simple-bus";
63		interrupt-parent = <&gic>;
64
65		#address-cells = <2>;
66		#size-cells = <2>;
67		ranges;
68
69		cpg: clock-controller@e6150000 {
70			reg = <0 0xe6150000 0 0x1000>;
71			#clock-cells = <2>;
72			#power-domain-cells = <0>;
73			#reset-cells = <1>;
74		};
75
76		gpio5: gpio@e6055000 {
77			compatible = "renesas,rcar-gpio";
78			reg = <0 0xe6055000 0 0x50>;
79			#gpio-cells = <2>;
80			gpio-controller;
81			interrupt-parent = <&gic>;
82			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
83			clocks = <&cpg CPG_MOD 907>;
84			status = "disabled";
85		};
86
87		sd0: mmc@ee100000 {
88			compatible = "renesas,rcar-mmc";
89			reg = <0 0xee100000 0 0x2000>;
90			interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL
91				      IRQ_DEFAULT_PRIORITY>;
92			clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>;
93			max-bus-freq = <200000000>;
94			status = "disabled";
95		};
96
97		emmc2: mmc@ee140000 {
98			compatible = "renesas,rcar-mmc";
99			reg = <0 0xee140000 0 0x2000>;
100			vmmc-supply = <&reg_3p3v>;
101			vqmmc-supply = <&reg_1p8v>;
102			interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL
103				      IRQ_DEFAULT_PRIORITY>;
104			clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>;
105			max-bus-freq = <200000000>;
106			status = "disabled";
107		};
108
109		pfc: pin-controller@e6060000 {
110			compatible = "renesas,rcar-pfc";
111			reg = <0 0xe6060000 0 0x50c>;
112		};
113
114		scif2: serial@e6e88000 {
115			compatible = "renesas,rcar-scif";
116			reg = <0 0xe6e88000 0 0x64>;
117			interrupt-parent = <&gic>;
118			clocks = <&cpg CPG_MOD 310>,
119				 <&cpg CPG_CORE R8A7795_CLK_S3D4>;
120			interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL
121				      IRQ_DEFAULT_PRIORITY>;
122			current-speed = <115200>;
123			interrupt-names = "irq_0";
124			status = "disabled";
125		};
126	};
127};
128