1/* 2 * Copyright (c) 2023 IoT.bzh 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <renesas/rcar/gen4/rcar_gen4_cr52.dtsi> 8#include <zephyr/dt-bindings/gpio/gpio.h> 9#include <zephyr/dt-bindings/clock/r8a779f0_cpg_mssr.h> 10 11/ { 12 soc { 13 /* The last four registers of this controller are 14 * located in the control domain 15 * A custom G4MH/RH850 µC firmware has to be flashed to access them 16 */ 17 pfc: pin-controller@e6050000 { 18 compatible = "renesas,rcar-pfc"; 19 reg = <0xe6050000 0x16c>, <0xe6050800 0x16c>, 20 <0xe6051000 0x16c>, <0xe6051800 0x16c>, 21 <0xdfd90000 0x16c>, <0xdfd90800 0x16c>, 22 <0xdfd91000 0x16c>, <0xdfd91800 0x16c>; 23 }; 24 25 /* Clock controller 26 * Using domain 0 as Linux 27 */ 28 cpg: clock-controller@e6150000 { 29 compatible = "renesas,r8a779f0-cpg-mssr"; 30 reg = <0xe6150000 0x4000>; 31 #clock-cells = <2>; 32 }; 33 34 gpio0: gpio@e6050180 { 35 compatible = "renesas,rcar-gpio"; 36 reg = <0xe6050180 0x54>; 37 #gpio-cells = <2>; 38 gpio-controller; 39 interrupts = <GIC_SPI 822 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; 40 clocks = <&cpg CPG_MOD 915>; 41 status = "disabled"; 42 }; 43 44 /* 45 * Control domain security has to be released to access gpio4 controller 46 * A custom G4MH/RH850 µC firmware has to be flashed to do that 47 */ 48 gpio4: gpio@dfd90180 { 49 compatible = "renesas,rcar-gpio"; 50 reg = <0xdfd90180 0x54>; 51 #gpio-cells = <2>; 52 gpio-controller; 53 interrupts = <GIC_SPI 826 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; 54 clocks = <&cpg CPG_MOD 915>; 55 status = "disabled"; 56 }; 57 58 /* Zephyr console */ 59 scif0: serial@e6e60000 { 60 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; 61 clocks = <&cpg CPG_MOD 702>, <&cpg CPG_CORE R8A779F0_CLK_S0D12_PER>; 62 }; 63 64 /* Linux console */ 65 scif3: serial@e6c50000 { 66 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; 67 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_CORE R8A779F0_CLK_S0D12_PER>; 68 }; 69 }; 70}; 71