1/*
2 * Copyright (c) 2020 Linumiz
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <arm/armv7-m.dtsi>
8#include <mem.h>
9#include <zephyr/dt-bindings/gpio/gpio.h>
10
11/ {
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		cpu@0 {
17			device_type = "cpu";
18			compatible = "arm,cortex-m4f";
19			reg = <0>;
20		};
21	};
22
23	sram0: memory@20000000 {
24		compatible = "mmio-sram";
25	};
26
27	flash0: flash@0 {
28		compatible = "serial-flash";
29		erase-block-size = <4096>;
30		write-block-size = <1>;
31	};
32
33	sysclk: system-clock {
34		compatible = "fixed-clock";
35		clock-frequency = <192000000>;
36		#clock-cells = <0>;
37	};
38
39	soc {
40		pinctrl: pinctrl@40000030 {
41			compatible = "nuvoton,numicro-pinctrl";
42			reg = <0x40000030 0x40
43			       0x40000080 0x20>;
44			reg-names = "mfp", "mfos";
45			status = "okay";
46		};
47
48		gpioa: gpio@40004000 {
49			compatible = "nuvoton,numicro-gpio";
50			reg = <0x40004000 0x40>;
51			status = "disabled";
52			interrupts = <16 2>;
53			gpio-controller;
54			#gpio-cells = <2>;
55			ngpios = <16>;
56		};
57
58		gpiob: gpio@40004040 {
59			compatible = "nuvoton,numicro-gpio";
60			reg = <0x40004040 0x40>;
61			status = "disabled";
62			interrupts = <17 2>;
63			gpio-controller;
64			#gpio-cells = <2>;
65			ngpios = <16>;
66		};
67
68		gpioc: gpio@40004080 {
69			compatible = "nuvoton,numicro-gpio";
70			reg = <0x40004080 0x40>;
71			status = "disabled";
72			interrupts = <18 2>;
73			gpio-controller;
74			#gpio-cells = <2>;
75			ngpios = <15>;
76		};
77
78		gpiod: gpio@400040c0 {
79			compatible = "nuvoton,numicro-gpio";
80			reg = <0x400040c0 0x40>;
81			status = "disabled";
82			interrupts = <19 2>;
83			gpio-controller;
84			#gpio-cells = <2>;
85			ngpios = <15>;
86		};
87
88		gpioe: gpio@40004100 {
89			compatible = "nuvoton,numicro-gpio";
90			reg = <0x40004100 0x40>;
91			status = "disabled";
92			interrupts = <20 2>;
93			gpio-controller;
94			#gpio-cells = <2>;
95			ngpios = <16>;
96		};
97
98		gpiof: gpio@40004140 {
99			compatible = "nuvoton,numicro-gpio";
100			reg = <0x40004140 0x40>;
101			status = "disabled";
102			interrupts = <21 2>;
103			gpio-controller;
104			#gpio-cells = <2>;
105			ngpios = <12>;
106		};
107
108		gpiog: gpio@40004180 {
109			compatible = "nuvoton,numicro-gpio";
110			reg = <0x40004180 0x40>;
111			status = "disabled";
112			interrupts = <72 2>;
113			gpio-controller;
114			#gpio-cells = <2>;
115			ngpios = <16>;
116		};
117
118		gpioh: gpio@400041c0 {
119			compatible = "nuvoton,numicro-gpio";
120			reg = <0x400041c0 0x40>;
121			status = "disabled";
122			interrupts = <88 2>;
123			gpio-controller;
124			#gpio-cells = <2>;
125			ngpios = <12>;
126		};
127
128		uart0: serial@40070000 {
129			compatible = "nuvoton,numicro-uart";
130			reg = <0x40070000 0x1000>;
131			status = "disabled";
132		};
133
134		uart1: serial@40071000 {
135			compatible = "nuvoton,numicro-uart";
136			reg = <0x40071000 0x1000>;
137			status = "disabled";
138		};
139
140		uart2: serial@40072000 {
141			compatible = "nuvoton,numicro-uart";
142			reg = <0x40072000 0x1000>;
143			status = "disabled";
144		};
145
146		uart3: serial@40073000 {
147			compatible = "nuvoton,numicro-uart";
148			reg = <0x40073000 0x1000>;
149			status = "disabled";
150		};
151
152		uart4: serial@40074000 {
153			compatible = "nuvoton,numicro-uart";
154			reg = <0x40074000 0x1000>;
155			status = "disabled";
156		};
157
158		uart5: serial@40075000 {
159			compatible = "nuvoton,numicro-uart";
160			reg = <0x40075000 0x1000>;
161			status = "disabled";
162		};
163
164		uart6: serial@40076000 {
165			compatible = "nuvoton,numicro-uart";
166			reg = <0x40076000 0x1000>;
167			status = "disabled";
168		};
169
170		uart7: serial@40077000 {
171			compatible = "nuvoton,numicro-uart";
172			reg = <0x40077000 0x1000>;
173			status = "disabled";
174		};
175
176	};
177};
178
179&nvic {
180	arm,num-irq-priority-bits = <4>;
181};
182