1/* SPDX-License-Identifier: Apache-2.0 */ 2 3#include <arm/armv7-m.dtsi> 4#include <nordic/nrf_common.dtsi> 5 6/ { 7 chosen { 8 zephyr,bt-hci = &bt_hci_controller; 9 zephyr,entropy = &rng; 10 zephyr,flash-controller = &flash_controller; 11 }; 12 13 cpus { 14 #address-cells = <1>; 15 #size-cells = <0>; 16 17 cpu@0 { 18 device_type = "cpu"; 19 compatible = "arm,cortex-m4f"; 20 reg = <0>; 21 #address-cells = <1>; 22 #size-cells = <1>; 23 24 itm: itm@e0000000 { 25 compatible = "arm,armv7m-itm"; 26 reg = <0xe0000000 0x1000>; 27 swo-ref-frequency = <32000000>; 28 }; 29 }; 30 }; 31 32 soc { 33 ficr: ficr@10000000 { 34 compatible = "nordic,nrf-ficr"; 35 reg = <0x10000000 0x1000>; 36 #nordic,ficr-cells = <1>; 37 status = "okay"; 38 }; 39 40 uicr: uicr@10001000 { 41 compatible = "nordic,nrf-uicr"; 42 reg = <0x10001000 0x1000>; 43 status = "okay"; 44 }; 45 46 sram0: memory@20000000 { 47 compatible = "mmio-sram"; 48 }; 49 50 clock: clock@40000000 { 51 compatible = "nordic,nrf-clock"; 52 reg = <0x40000000 0x1000>; 53 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 54 status = "okay"; 55 }; 56 57 power: power@40000000 { 58 compatible = "nordic,nrf-power"; 59 reg = <0x40000000 0x1000>; 60 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>; 61 status = "okay"; 62 #address-cells = <1>; 63 #size-cells = <1>; 64 65 gpregret1: gpregret1@4000051c { 66 #address-cells = <1>; 67 #size-cells = <1>; 68 compatible = "nordic,nrf-gpregret"; 69 reg = <0x4000051c 0x1>; 70 status = "okay"; 71 }; 72 73 gpregret2: gpregret2@40000520 { 74 #address-cells = <1>; 75 #size-cells = <1>; 76 compatible = "nordic,nrf-gpregret"; 77 reg = <0x40000520 0x1>; 78 status = "okay"; 79 }; 80 }; 81 82 radio: radio@40001000 { 83 compatible = "nordic,nrf-radio"; 84 reg = <0x40001000 0x1000>; 85 interrupts = <1 NRF_DEFAULT_IRQ_PRIORITY>; 86 status = "okay"; 87 ieee802154-supported; 88 ble-2mbps-supported; 89 ble-coded-phy-supported; 90 tx-high-power-supported; 91 92 ieee802154: ieee802154 { 93 compatible = "nordic,nrf-ieee802154"; 94 status = "disabled"; 95 }; 96 97 /* Note: In the nRF Connect SDK the SoftDevice Controller 98 * is added and set as the default Bluetooth Controller. 99 */ 100 bt_hci_controller: bt_hci_controller { 101 compatible = "zephyr,bt-hci-ll-sw-split"; 102 status = "okay"; 103 }; 104 }; 105 106 uart0: uart@40002000 { 107 /* uart can be either UART or UARTE, for the user to pick */ 108 /* compatible = "nordic,nrf-uarte" or "nordic,nrf-uart"; */ 109 compatible = "nordic,nrf-uarte"; 110 reg = <0x40002000 0x1000>; 111 interrupts = <2 NRF_DEFAULT_IRQ_PRIORITY>; 112 status = "disabled"; 113 }; 114 115 i2c0: i2c@40003000 { 116 /* 117 * This i2c node can be TWI, TWIM, or TWIS, 118 * for the user to pick: 119 * compatible = "nordic,nrf-twi" or 120 * "nordic,nrf-twim" or 121 * "nordic,nrf-twis". 122 */ 123 compatible = "nordic,nrf-twim"; 124 #address-cells = <1>; 125 #size-cells = <0>; 126 reg = <0x40003000 0x1000>; 127 clock-frequency = <I2C_BITRATE_STANDARD>; 128 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 129 easydma-maxcnt-bits = <16>; 130 status = "disabled"; 131 }; 132 133 spi0: spi@40003000 { 134 /* 135 * This spi node can be SPI, SPIM, or SPIS, 136 * for the user to pick: 137 * compatible = "nordic,nrf-spi" or 138 * "nordic,nrf-spim" or 139 * "nordic,nrf-spis". 140 */ 141 compatible = "nordic,nrf-spim"; 142 #address-cells = <1>; 143 #size-cells = <0>; 144 reg = <0x40003000 0x1000>; 145 interrupts = <3 NRF_DEFAULT_IRQ_PRIORITY>; 146 max-frequency = <DT_FREQ_M(8)>; 147 easydma-maxcnt-bits = <16>; 148 status = "disabled"; 149 }; 150 151 i2c1: i2c@40004000 { 152 /* 153 * This i2c node can be TWI, TWIM, or TWIS, 154 * for the user to pick: 155 * compatible = "nordic,nrf-twi" or 156 * "nordic,nrf-twim" or 157 * "nordic,nrf-twis". 158 */ 159 compatible = "nordic,nrf-twim"; 160 #address-cells = <1>; 161 #size-cells = <0>; 162 reg = <0x40004000 0x1000>; 163 clock-frequency = <I2C_BITRATE_STANDARD>; 164 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 165 easydma-maxcnt-bits = <16>; 166 status = "disabled"; 167 }; 168 169 spi1: spi@40004000 { 170 /* 171 * This spi node can be SPI, SPIM, or SPIS, 172 * for the user to pick: 173 * compatible = "nordic,nrf-spi" or 174 * "nordic,nrf-spim" or 175 * "nordic,nrf-spis". 176 */ 177 compatible = "nordic,nrf-spim"; 178 #address-cells = <1>; 179 #size-cells = <0>; 180 reg = <0x40004000 0x1000>; 181 interrupts = <4 NRF_DEFAULT_IRQ_PRIORITY>; 182 max-frequency = <DT_FREQ_M(8)>; 183 easydma-maxcnt-bits = <16>; 184 status = "disabled"; 185 }; 186 187 nfct: nfct@40005000 { 188 compatible = "nordic,nrf-nfct"; 189 reg = <0x40005000 0x1000>; 190 interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; 191 status = "disabled"; 192 }; 193 194 gpiote: gpiote0: gpiote@40006000 { 195 compatible = "nordic,nrf-gpiote"; 196 reg = <0x40006000 0x1000>; 197 interrupts = <6 5>; 198 status = "disabled"; 199 instance = <0>; 200 }; 201 202 adc: adc@40007000 { 203 compatible = "nordic,nrf-saadc"; 204 reg = <0x40007000 0x1000>; 205 interrupts = <7 NRF_DEFAULT_IRQ_PRIORITY>; 206 status = "disabled"; 207 #io-channel-cells = <1>; 208 }; 209 210 timer0: timer@40008000 { 211 compatible = "nordic,nrf-timer"; 212 status = "disabled"; 213 reg = <0x40008000 0x1000>; 214 cc-num = <4>; 215 max-bit-width = <32>; 216 interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; 217 prescaler = <0>; 218 }; 219 220 timer1: timer@40009000 { 221 compatible = "nordic,nrf-timer"; 222 status = "disabled"; 223 reg = <0x40009000 0x1000>; 224 cc-num = <4>; 225 max-bit-width = <32>; 226 interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; 227 prescaler = <0>; 228 }; 229 230 timer2: timer@4000a000 { 231 compatible = "nordic,nrf-timer"; 232 status = "disabled"; 233 reg = <0x4000a000 0x1000>; 234 cc-num = <4>; 235 max-bit-width = <32>; 236 interrupts = <10 NRF_DEFAULT_IRQ_PRIORITY>; 237 prescaler = <0>; 238 }; 239 240 rtc0: rtc@4000b000 { 241 compatible = "nordic,nrf-rtc"; 242 reg = <0x4000b000 0x1000>; 243 cc-num = <3>; 244 interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; 245 status = "disabled"; 246 clock-frequency = <32768>; 247 prescaler = <1>; 248 }; 249 250 temp: temp@4000c000 { 251 compatible = "nordic,nrf-temp"; 252 reg = <0x4000c000 0x1000>; 253 interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; 254 status = "okay"; 255 }; 256 257 rng: random@4000d000 { 258 compatible = "nordic,nrf-rng"; 259 reg = <0x4000d000 0x1000>; 260 interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; 261 status = "okay"; 262 }; 263 264 ecb: ecb@4000e000 { 265 compatible = "nordic,nrf-ecb"; 266 reg = <0x4000e000 0x1000>; 267 interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; 268 status = "okay"; 269 }; 270 271 ccm: ccm@4000f000 { 272 compatible = "nordic,nrf-ccm"; 273 reg = <0x4000f000 0x1000>; 274 interrupts = <15 NRF_DEFAULT_IRQ_PRIORITY>; 275 length-field-length-8-bits; 276 status = "okay"; 277 }; 278 279 wdt: wdt0: watchdog@40010000 { 280 compatible = "nordic,nrf-wdt"; 281 reg = <0x40010000 0x1000>; 282 interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; 283 status = "okay"; 284 }; 285 286 rtc1: rtc@40011000 { 287 compatible = "nordic,nrf-rtc"; 288 reg = <0x40011000 0x1000>; 289 cc-num = <4>; 290 interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; 291 status = "disabled"; 292 clock-frequency = <32768>; 293 prescaler = <1>; 294 }; 295 296 qdec: qdec0: qdec@40012000 { 297 compatible = "nordic,nrf-qdec"; 298 reg = <0x40012000 0x1000>; 299 interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; 300 status = "disabled"; 301 }; 302 303 comp: comparator@40013000 { 304 /* 305 * This comparator node can be COMP or LPCOMP, 306 * for the user to pick: 307 * compatible = "nordic,nrf-comp" or 308 * "nordic,nrf-lpcomp". 309 */ 310 compatible = "nordic,nrf-comp"; 311 reg = <0x40013000 0x1000>; 312 interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; 313 status = "disabled"; 314 #io-channel-cells = <1>; 315 }; 316 317 egu0: swi0: egu@40014000 { 318 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 319 reg = <0x40014000 0x1000>; 320 interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; 321 status = "okay"; 322 }; 323 324 egu1: swi1: egu@40015000 { 325 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 326 reg = <0x40015000 0x1000>; 327 interrupts = <21 NRF_DEFAULT_IRQ_PRIORITY>; 328 status = "okay"; 329 }; 330 331 egu2: swi2: egu@40016000 { 332 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 333 reg = <0x40016000 0x1000>; 334 interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; 335 status = "okay"; 336 }; 337 338 egu3: swi3: egu@40017000 { 339 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 340 reg = <0x40017000 0x1000>; 341 interrupts = <23 NRF_DEFAULT_IRQ_PRIORITY>; 342 status = "okay"; 343 }; 344 345 egu4: swi4: egu@40018000 { 346 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 347 reg = <0x40018000 0x1000>; 348 interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; 349 status = "okay"; 350 }; 351 352 egu5: swi5: egu@40019000 { 353 compatible = "nordic,nrf-egu", "nordic,nrf-swi"; 354 reg = <0x40019000 0x1000>; 355 interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; 356 status = "okay"; 357 }; 358 359 timer3: timer@4001a000 { 360 compatible = "nordic,nrf-timer"; 361 status = "disabled"; 362 reg = <0x4001a000 0x1000>; 363 cc-num = <6>; 364 max-bit-width = <32>; 365 interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; 366 prescaler = <0>; 367 }; 368 369 timer4: timer@4001b000 { 370 compatible = "nordic,nrf-timer"; 371 status = "disabled"; 372 reg = <0x4001b000 0x1000>; 373 cc-num = <6>; 374 max-bit-width = <32>; 375 interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>; 376 prescaler = <0>; 377 }; 378 379 pwm0: pwm@4001c000 { 380 compatible = "nordic,nrf-pwm"; 381 reg = <0x4001c000 0x1000>; 382 interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; 383 status = "disabled"; 384 #pwm-cells = <3>; 385 }; 386 387 pdm0: pdm@4001d000 { 388 compatible = "nordic,nrf-pdm"; 389 reg = <0x4001d000 0x1000>; 390 interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; 391 status = "disabled"; 392 }; 393 394 acl: acl@4001e000 { 395 compatible = "nordic,nrf-acl"; 396 reg = <0x4001e000 0x1000>; 397 status = "okay"; 398 }; 399 400 flash_controller: flash-controller@4001e000 { 401 compatible = "nordic,nrf52-flash-controller"; 402 reg = <0x4001e000 0x1000>; 403 partial-erase; 404 405 #address-cells = <1>; 406 #size-cells = <1>; 407 408 409 flash0: flash@0 { 410 compatible = "soc-nv-flash"; 411 erase-block-size = <4096>; 412 write-block-size = <4>; 413 }; 414 }; 415 416 ppi: ppi@4001f000 { 417 compatible = "nordic,nrf-ppi"; 418 reg = <0x4001f000 0x1000>; 419 status = "okay"; 420 }; 421 422 mwu: mwu@40020000 { 423 compatible = "nordic,nrf-mwu"; 424 reg = <0x40020000 0x1000>; 425 status = "okay"; 426 }; 427 428 pwm1: pwm@40021000 { 429 compatible = "nordic,nrf-pwm"; 430 reg = <0x40021000 0x1000>; 431 interrupts = <33 NRF_DEFAULT_IRQ_PRIORITY>; 432 status = "disabled"; 433 #pwm-cells = <3>; 434 }; 435 436 pwm2: pwm@40022000 { 437 compatible = "nordic,nrf-pwm"; 438 reg = <0x40022000 0x1000>; 439 interrupts = <34 NRF_DEFAULT_IRQ_PRIORITY>; 440 status = "disabled"; 441 #pwm-cells = <3>; 442 }; 443 444 spi2: spi@40023000 { 445 /* 446 * This spi node can be SPI, SPIM, or SPIS, 447 * for the user to pick: 448 * compatible = "nordic,nrf-spi" or 449 * "nordic,nrf-spim" or 450 * "nordic,nrf-spis". 451 */ 452 compatible = "nordic,nrf-spim"; 453 #address-cells = <1>; 454 #size-cells = <0>; 455 reg = <0x40023000 0x1000>; 456 interrupts = <35 NRF_DEFAULT_IRQ_PRIORITY>; 457 max-frequency = <DT_FREQ_M(8)>; 458 easydma-maxcnt-bits = <16>; 459 status = "disabled"; 460 }; 461 462 rtc2: rtc@40024000 { 463 compatible = "nordic,nrf-rtc"; 464 reg = <0x40024000 0x1000>; 465 cc-num = <4>; 466 interrupts = <36 NRF_DEFAULT_IRQ_PRIORITY>; 467 status = "disabled"; 468 clock-frequency = <32768>; 469 prescaler = <1>; 470 }; 471 472 i2s0: i2s@40025000 { 473 compatible = "nordic,nrf-i2s"; 474 #address-cells = <1>; 475 #size-cells = <0>; 476 reg = <0x40025000 0x1000>; 477 interrupts = <37 NRF_DEFAULT_IRQ_PRIORITY>; 478 status = "disabled"; 479 }; 480 481 usbd: usbd@40027000 { 482 compatible = "nordic,nrf-usbd"; 483 reg = <0x40027000 0x1000>; 484 interrupts = <39 NRF_DEFAULT_IRQ_PRIORITY>; 485 num-bidir-endpoints = <1>; 486 num-in-endpoints = <7>; 487 num-out-endpoints = <7>; 488 num-isoin-endpoints = <1>; 489 num-isoout-endpoints = <1>; 490 status = "disabled"; 491 }; 492 493 uart1: uart@40028000 { 494 compatible = "nordic,nrf-uarte"; 495 reg = <0x40028000 0x1000>; 496 interrupts = <40 NRF_DEFAULT_IRQ_PRIORITY>; 497 status = "disabled"; 498 }; 499 500 qspi: qspi@40029000 { 501 compatible = "nordic,nrf-qspi"; 502 #address-cells = <1>; 503 #size-cells = <0>; 504 reg = <0x40029000 0x1000>, <0x12000000 0x8000000>; 505 reg-names = "qspi", "qspi_mm"; 506 interrupts = <41 NRF_DEFAULT_IRQ_PRIORITY>; 507 status = "disabled"; 508 }; 509 510 pwm3: pwm@4002d000 { 511 compatible = "nordic,nrf-pwm"; 512 reg = <0x4002d000 0x1000>; 513 interrupts = <45 NRF_DEFAULT_IRQ_PRIORITY>; 514 status = "disabled"; 515 #pwm-cells = <3>; 516 }; 517 518 spi3: spi@4002f000 { 519 compatible = "nordic,nrf-spim"; 520 #address-cells = <1>; 521 #size-cells = <0>; 522 reg = <0x4002f000 0x1000>; 523 interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>; 524 max-frequency = <DT_FREQ_M(32)>; 525 easydma-maxcnt-bits = <16>; 526 rx-delay-supported; 527 rx-delay = <2>; 528 status = "disabled"; 529 }; 530 531 gpio0: gpio@50000000 { 532 compatible = "nordic,nrf-gpio"; 533 gpio-controller; 534 reg = <0x50000000 0x200 535 0x50000500 0x300>; 536 #gpio-cells = <2>; 537 status = "disabled"; 538 port = <0>; 539 gpiote-instance = <&gpiote>; 540 }; 541 542 gpio1: gpio@50000300 { 543 compatible = "nordic,nrf-gpio"; 544 gpio-controller; 545 reg = <0x50000300 0x200 546 0x50000800 0x300>; 547 #gpio-cells = <2>; 548 ngpios = <16>; 549 status = "disabled"; 550 port = <1>; 551 gpiote-instance = <&gpiote>; 552 }; 553 554 cryptocell: crypto@5002a000 { 555 compatible = "nordic,cryptocell", "arm,cryptocell-310"; 556 reg = <0x5002a000 0x1000>, <0x5002b000 0x1000>; 557 reg-names = "wrapper", "core"; 558 interrupts = <42 NRF_DEFAULT_IRQ_PRIORITY>; 559 status = "disabled"; 560 }; 561 }; 562}; 563 564&nvic { 565 arm,num-irq-priority-bits = <3>; 566}; 567 568&systick { 569 /* Use RTC for system clock, instead of SysTick. */ 570 status = "disabled"; 571}; 572
